Kenwood KR-A5040 Service Manual page 8

KR-A5040
CIRCUIT DESCRIPTION
0: Without diode
2) Destination set SW: E type/K type & With diode (D912 or Q902 ON eed 3) Specification set SW: AM1700k/AM1610k
Besinaien Oeste ae Reception Channel Reference! With destination set SW at "O": Effective only for K type
| Specification
|_Set SW RANOM | frequency band | space | frequency p ree | AM reception frequency band
| "EM. 87.5~108.0 MHz| 100 kHz |_50 kHz
0 K
ny
530~1610 kHz ene re
oO
5§30~1610 kHz
530~1700 kHz 1 é Z | 530~1700 kHz
AG | | | "| 0: Without diode
| _ |_FM_|87.5~108.0 MHz) 50 kHz | 60 kHz ee)
[AM | 531~1602 kHz | 9kHz | 9 kHz
in description
Pin No. | Pinname | 1/0 Name Function
1 PY | O VRDOWN Potentiometer down operation control. High: V down
; oe Low: Normal state
2 PY2 BACKUP Backup (AC outlet off) detection. High: Norma! state
Low: AC outlet off
When the power is switched on, high is input.
When low Is input, the microprocessor stops clock generation and enters the backup state.
I 7 | When the signal changes from low to high, the backup state changes to the normal state.
3 RMC | REMOCON REMOCON signal input. active Low
4~11 PXO0~PX3 KRO~KR?7 KEY RETURN signal input. High There Is input.
PDO0~PD3 | ae Low: There IS NO input. _
12~16 PCO~PC3 O KSO~KS4 | KEY SCAN signal output. Normally high is output.
PFO Key scan Is performed when KEY ts ON.
17 PF1 O = NC
| tak Ee ae eee eee
18 PPZ @) VOLLED Volume LED signal output. High: OF F
Low: ON
19 Ero O SELST Data latch signal output to TC9162/TC9164.
| Data is latched on the rising edge.
20 PEO O DATA LM7001 (PLL IC), TC9162/TC9164 {selector IC) control serial data output.
Data Is latched on the nsing edge of the clock.
21 PEs | O CLOCK LM7001, TC9162/TC9164 control serial data transfer shift clock output. Data is Jatched on the rising edge
+ of the clock.
i sore pe ee
22 | PEZ O | PLLLT i CE signal output to LM7001. When the signal is high, LM7001 ts enabied.
23 PES O _ NC.
4 PE ee AEA eas
24 PBO O POWER Power supply circuit relay on/off control. High: ON
| Low: OFF
25 PB1 O MUTE 1 TAPE 2 REC OUT mute control. High: MLJTE OFF
Low: MUTE ON
26 PB2 O MUTE 2 LINE OUT mute control. High: MLITE OFF
Low: MUTE ON
27 PB3 | O CDDL | CD DIRECT LED signal output. High :CFF
Low: QN
28 PAO | SD Tuner tuned detection. High: \ SIGNAL
i
Low: IUINED
29 PA STEREO Tuner FM stereo detection. High: HCONO
| Low: Ste reo
30 PA2 /O SDATA | This pin and serial data pin 59 are shorted.
31 PA3 I/O BUSY Serial busy signal input/output.
is oom enna
32 Vss — GND GND.
33~50 50~ $15.77, 16} O Sa~So, Sp~ Sr Fluorescent display segment drive signal output. ee
51 75 O _ N.C.
52~56 T4~TO O G5~G1 Fluorescent display digit drive signal output.
eee | saa Lees rats =
57 Veop — Veop Fluorescent display output driver circuit power supply. 3s
58 INT2 | —_ Unused pin. This pin and GND are shorted. _
59 INT1 SDATA This pin and serial data input pin 30 are shorted. es et
60 XTAL + O XTAL Clock generation circuit output.
60 | XT | O | XTAL | Clock genera di el ll ries ee eer s I
61 EXTAL EXTAL Clock generation circuit input,
62 Rok | RESET Reset signal input. ; 7 ea
63 PYQ O VRUP Nelume up operation eanteol: High: iP
8 Low: tor mal stale...
64 Voo ca Vip +5 v power supply.