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6. CIRCUIT DESCRIPTION
1. KLM-833 Analog Circuit
Audio signal route
Level of Audio signal input from Connector CN-11 pin 2
is decided by Relay RY1 which is controlled by Attenuator
SW. Level of Audio signal amplified by 1/2 IC31 is change
able by Input Level VR (VR101). Audio signal re-amplified
by 1/2 IC31 (4558) is sent to each of (1) 2 kinds of Low-
pass filter LPF-1, LPF-2 (2) Direct Out VR 102, 1/2 IC36
and (3) Q24.
Q24 is amplifier for trigger controlled by Audio signal
sending trigger signal to CPU port PA7 (IC23, pin 8)
while sampling and start sampling according to Audio
signal level.
IC35 is an Analog Switch selecting which Audio signal
will be output, one from LPF-1, one from LPF-2 or no
signal (OFF). This IC is controlled by Gate Array. In
this case, OFF is selected to off Audio signal and make
Audio signal not to be sent to A/D while REC CANCEL.
This IC35 is controlled by Gate Array IC22 pin 29 (SOFF
terminal). (SOFF terminal is "L" while REC CANCEL)
Selecting of LPF-1, LPF-2 is made by CPU IC23. This is,
CPU address is decoded by decoder IC56 and let IC47
latch data. Filter selecting signal is controlled by IC47
latch output pin 15. When delay time mode is x 4, this
terminal comes to be "H" and LPF-1 (4.5KHz) is selected.
1/2 IC33 (Pin 1,2,3) works as Pre-emphasis, and Mix Amp
of FEED BACK and 1/2 IC33 (Pin 5,6,7), IC32, IC37
work
as
Analog
Compander
(Compressor+Expander)
and Audio signal.
1/2 IC13 is an Analog Switch and works as a Bypass Switch
of Analog Compander Circuit. This IC is controlled by
pin 27 :COMP Terminal of Gate Array IC22. ("L" at Delay,
"H" at Sampling, Sequencer)
While sampling, it lets compressed Audio signal bypass
Analog Compander Part not to have compressing error.
Output signal (LCOM terminal) of IC13 is output as A/D
signal to Digital Circuit.
D/A signal once digitalized in Digital Circuit changes to
Analog signal after through D/A and is input to IC29, IC32.
IC32 constructs Expander with 1/2 IC34, and IC37.
IC29 constructs Audio Muting Circuit with IC30. 1/2
IC13 is an Analog Switch and works with Compander to
make Audio signal bypass Expander while Sampling.
IC 29:
Signal
Muting Circuit is VCA which has time
Constance in order not to generate Noise at signal sudden
ON/OFF
and
smoothen
Audio signal
while
sampling.
This IC works with control signal from CPU PA6 terminal
letting IC30 drive VCA.
IC39 is an Analog Switch selecting which Audio signal
will be output, one from LPF-3, one from LPF-4 or no
signal (=OFF). OFF is selected in order to off delay sound
while REC SYNC SW is ON (Sampling, Sequencer, Trigger
Overdub are ON). When those Switches are ON, Gate Array
IC22 pin 28 (DOFF terminal) becomes "H" and off output
from IC39.
The
signal which passes IC39 is de-emphasized at 1/2
IC40 (pin 5,6,7) and go into EFFECT Volume Control
Circuit and FEED BACK Volume Control Circuit.
A) EFFECT Volume Control Circuit
EFFECT Level data from CPU DATA BUS DO - D7
is latched by IC44 and IC44 lets Analog switches IC45,
IC46 control Block R. RM8 to decide EFFECT level.
B) FEED BACK Volume Control
FEED BACK Level Data of CPU DATA BUS is latched
by
IC41
and
IC41
lets Analog Switches IC42, IC43
control Block R. RM7 to decide FEED BACK level.
Phase of FEED BACK signal output from Block R. RM7
is inverted at 1/2 IC40 (pin 1,2,3).
Analog SW. IC42 selects if normal or inverted and the
feedbacked signal is returned to IC35 output.
(Note:
Analog
Switch is controlled by CPU
DATA
latched by IC41.)
MODULATION PART
FREQ.
At 2/4 IC54 (pin 5,6,7 pin 8,9,10), Triangle Wave Oscillator
Circuit
is constructed.
Data from CPU
DATA BUS is
latched by IC47 and IC47 Analog SW. IC49, IC48 control
RM9 to decide oscillation frequency.
INTENSITY
Data from CPU DATA BUS DATA is latched by IC50
and lets Analog Switch IC51, 52 control Block R. RM10
to be working as attenuator in order to decide MG INT.
IC53 latches Scale Data which is from CPU DATA BUS
By the latched data, IC55 works as D/A and input latched
data to pin 2 of IC54 and mix with basic voltage to control
VCO: IC21 which changes system clock.
2. KLM-833 Digital Circuit
1) Audio Signal Path
A/D signal is made to be S/H by IC15 and 1/2 IC14.
The signal made to be S/H is at IC17 and to be Digital
signal
after linearization
(12bit)
by
D/A
IC18 and
Succesive
Approximation
Registers.
And
memorized
into IC11 — IC14 accordingly.
IC3, IC2 (74HC138) are decoders.
Gate Array reads Delay value from DATA BUS of CPU
and outputs address which accesses D-RAM. And output
data from D-RAM returns to Gate Array and Gate
Array
controls
IC18 to
output D/A signal. Output
data from D/A is made to be S/H at IC16, 1/2 IC14
and output to Analog Circuit as analog signal.
2) System Clock Path
VCO control D/C voltage is sent from Analog Circuit
to IC21
pin 13. With the voltage, IC21 generates and
supplies System Clock to IC22 pin 31. Gate Array IC22
produces Timing which controls each part of SDD-2000.
-19-
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