NEC mPD7755 User Manual page 10

(3) ST (Input)
This is the start signal input pin. When a low level
signal is input to this pin when the CS signal is
also low level, speech synthesis of the message
stored in the speech ROM location addressed by the
contents of
10-17
begins.
When the CS and
1Pf
signals are both set to low level,
the standby mode is released.
(4) BUSY (Output)
This is an active low level pin that outputs the BUSY
signal. A low level signal is output from this pin
when the start signal is accepted; and once this
output becomes low level, the start input will not
be accepted. The output from this pin becomes high
impedance in standby mode.
(5) REF (Input)
This pin inputs the reference current for the D/A
converter. The output current of the D/A current is
controlled by the current input to this pin. This pin
should be connected to VD D via a resistor. In standby
mode, this pin becomes high impedance.
(6) AVO (Output)
This pin outputs the analog speech signal, which is
a unipolar, sink current.
(7) RESET (Input)
This is the reset signal input pin and is used to
initialize the LSI at power up, abort the speech
synthesis, and release the standby mode. To reset the
chip, this signal must be held low for at least 12
oscillator clocks. When the standby mode is released,
at least 12 clocks must be input after clock oscilla-
tion completes.
(8) Xl, X2
These are the clock pins and are connected to a cera-
mic resonator (640kHz). During standby mode, the Xl
becomes low level and the X2 becomes high level.
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