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Pin
1
2
3
4
5
6
7
8
9
10
11
12
3.2.3 Video performance
Item
Max. support Pixel rate
Max. Resolution
Rise time + Fall time
Settling
Time
overshoot /undershoot
Overshoot/Undershoot
3.2.4 Scan range
Item
Horizontal
Vertical
3.2.5 Plug & Play DDC2B DDC-CISupport
Item
DDC channel type
EDID
DDC-CI
Signal Assignment
TMDS RX2-
TMDS RX2+
TMDS Ground
Floating
Floating
DDC Clock
DDC Data
Floating
TMDS RX1-
TMDS RX1+
TMDS Ground
Floating
Condition
after
Condition
Condition
- 8 -
Pin
Signal Assignment
13
Floating
14
+5V Power
15
Ground
16
Hot Plug Detect
17
TMDS RX0-
18
TMDS RX0+
19
TMDS Ground
20
Floating
21
Floating
22
TMDS Ground
23
TMDS Clock+
24
TMDS Clock-
Spec
146.25 MHz
1680 x 1050
< 5 ms
(50% of minimum pixel
clock period)
< 5% final full-scale value √
< 12% of step function
voltage level over the full
voltage range
Spec
31-82 KHz
56-76 Hz
Spec
DDC2B
Version 1.3
Version 1.1 or Later
OK N.A
Remark
Both for analog and
√
digital inputs
Both for analog and
√
digital inputs
1680 x 1050 @ 60Hz
√
(max. support timing)
Refer to VESA VSIS
Standard V1R1
Refer to VESA VSIS
√
Standard V1R1
OK N.A
Remark
√
√
OK N.A
Remark
√
Refer to S/W spec.
document to see the
√
detailed EDID data
definition.
√
Refer to S/W spec
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