Principles Of Operation; Ch1, Ch2, Cl1 And Cl2 - Crown CH Series Operation Manual

CH and CL Series Power Amplifiers

5 Principles of Operation

5.1 CH1, CH2, CL1 and CL2

For the sake of simplicity, only channel one of
the amplifier is described.
Signal is presented to the amplifier through one
of three connectors when using the standard
input module. Each channel is outfitted with a
balanced XLR connector and a barrier strip.
These connectors are wired in parallel, which
allows daisy chaining when needed. The signal
is then converted from balanced to unbalanced
in the Balanced Input Stage where it also
receives RFI protection. Signal then flows into
the Variable Gain Stage where the rear-panel
level controls are allowed to affect the gain.
Following this stage, the signal is put under the
control of a full-time compressor circuit com-
prised of a symmetrical window detector, a
buffer amplifier, and the gating op amp which
uses several small components to set the com-
pressor's attack and decay characteristics. The
actual compressing is accomplished by an
opto-isolator which affects the gain in the sig-
nal path.
BALANCED
INPUT STAGE
Operation Manual
The signal then travels either through the HP
filter module or is bypassed around it depend-
ing on the position of the channel operation
switch. In the CH1 and CH2, with the switch set
in the 70V position, the filter is enabled. The fil-
ter is an 18 dB-per-octave high-pass with a –3
dB rolloff at 70 Hz. This provides a measure of
protection to step-down transformers used in
distributed speakers installations. With the
switch set in the 4/8 Ohm setting, the filter is
bypassed.
The signal next enters the main amplifier error
amp where it is mixed with a small portion of
the output signal in such a way as to control the
amplifier's overall output performance.
Following the error amp is the LVA stage, where
the low-voltage referenced signal gets trans-
lated to the output high-voltage rails. The last
voltage amplifier, in conjunction with a boot-
strap current source, drives both predrivers and
the bias servo. The bias servo is mounted in
such a way as to translate the output heatsink
temperature into a controlled bias current to
Figure 5.1 Models CH1 & CH2 Circuit Block Diagram
prevent thermal runaway and hold the ampli-
fier's notch distortion to a minimum.
The predrivers provide enough signal to acti-
vate the drivers, which together operate in the
class AB range. For the major output current
requirements, the drivers feed the various num-
bers of paralleled output transistors which
operate in a class B mode. This is referred to as
the Triple-Deep Darlington Output Stages.
The output transistors are protected by the Time
Dependent Voltage & Current circuit. This cir-
cuit protects the devices from extending
beyond their safe area of operation, but allows
the devices to provide high bursts of peak
power when needed. This amplifier output
topology offers a good combination of low qui-
escent amplifier heating, great distortion per-
formance at high powers, and relative
simplicity, with impressive reliability and value.
All output power is delivered through a chan-
nel-independent, dead front barrier block on
the back panel. When the Channel Operation
70V
70V
4 / 8 OHMS
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