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Input
Address
Port
Timing
SHORT
MODE
SRAS
SCAC
* wa
In case
of short
mode,
delay
time
setting
is set in above
timing. The
date
loaded
to SDATA
is written
on
the leading
edge
timing. In order to select
that the data latch for row address strobe or column address strobe is loaded,
SRAS
or
SCAS
port
is controlled.
When
changing
delay
time
setting, meaningless
data
on a memory
are read.
this causes
the pop noise. when
SRAS
or SCAS
is controlled, mute
circuit (pin
55 is input, pin 56 is output) is activated. Mute
time is the same
as the delay
time which is set at that time.
(Serial data input mode
only, On parallel data
input mode, mute
circuit is activated by using the mute
control port pin 18.)
On long mode, input data number
is 9, the way
of setting delay time is same.
—15—
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