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YMF795
4. AC characteristics
Conditions: Input signal of V
Timing measurement at V
4-1. CLK_I ,Reset
Parameter
CLK_I clock period
CLK_I "L" pulse width
CLK_I "H" pulse width
/RST active "L" pulse width
SCLK start delay time
(after /RST inactive)
Note) T
=-40 to 85°C, DVDD=3.3±0.3V, Capacitor load=50pF
OP
"
CLK_I" indicates the number of clocks inputted through the CLK_I pin.
×
CLK_I Duty
Hardware Reset
=0.8×DVDD, V
=0.1×DVDD.
IH
IL
=0.7×DVDD, V
IH
Symbol
Tcclk_period
Tcclk_low
Tcclk_high
Trst_low
Trst2clk
-39-
=0.2×DVDD.
IL
Min.
Typ.
35.8
12
12
100
64
Max.
Unit
ns
ns
ns
× CLK_I
× CLK_I
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