Use Methods; Description Of Registers; Write / Read And Bank Select; Register Table (Basic Time And Calendar Register) - Epson RX8900SA/CE Applications Manual

Real time clock module
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RX8900 SA / CE

8. Use Methods

8.1. Description of Registers

8.1.1. Write / Read and Bank Select

Address 00h to 0Fh : Basic time and calendar register
Address 10h to 1Fh : Extension register

8.1.2. Register table (Basic time and calendar register)

Address
Function
00
SEC
01
MIN
02
HOUR
03
WEEK
04
DAY
05
MONTH
06
YEAR
07
RAM
08
MIN Alarm
09
HOUR Alarm
WEEK Alarm
0A
DAY Alarm
0B
Timer Counter 0
0C
Timer Counter 1
0D
Extension Register
0E
Flag Register
0F
Control Register
Note
When after the initial power-up (from 0V) or when the result of read out the VLF bit is "1" , initialize all registers,
before using the module.
Be sure to avoid entering incorrect date and time data, as clock operations are not guaranteed when the data or
time data is incorrect.
1)
During the initial power-up, the TEST bit is reset to "0" and the VLF bit is set to "1".
 At this point, all other register values are undefined, so be sure to perform a reset before using the module.
2)
Only a "0" can be written to the UF, TF, AF, VLF, or VDET bit.
3)
Any bit marked with "
4)
Any bit marked with "" is a RAM bit that can be used to read or write any data.
5)
The TEST bit is used by the manufacturer for testing. Be sure to set "0" for this bit when writing.
.
bit 7
bit 6
40
40
6
80
40
AE
40
AE
6
AE
128
64
TEST WADA USEL
CSEL1 CSEL0
" should be used with a value of "0" after initialization.
... C
ompatible with RX-8803.
bit 5
bit 4
bit 3
bit 2
20
10
8
4
20
10
8
4
20
10
8
4
5
4
3
2
20
10
8
4
10
8
4
20
10
8
4
20
10
8
4
20
10
8
4
5
4
3
2
20
10
8
4
32
16
8
4
2048
1024
TE
FSEL1 FSEL0 TSEL1 TSEL0
UF
TF
AF
UIE
TIE
AIE
Page - 6
bit 1
bit 0
Read
Write
P
2
1
P
2
1
P
2
1
1
0
P
P
2
1
P
2
1
2
1
P
P
P
2
1
2
1
P
1
0
P
2
1
2
1
P
P
512
256
P
VLF
VDET
P
P
RESET
P : Possible , I : Impossible
ETM45E-01
P
P
P
P
P
P
P
P
P
P
P
P
P
P
P
P

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