Aiwa NSX-AJ305 U Service Manual page 54

IC DESCRIPTION-1/1 (LC78645)-2/2
Pin No. Pin Name
43 LVSS
44 RVSS
45 RCHO
46 RVDD
47 XVDD
48 XOUT
49 XIN
50 FSX/16MIN
51 XVSS
52 C2F
53 EFLG
54 16MOUT
55 ASLRCK
56 ASDACK
57 ASDFIN
58 LRSY
59 DATACK
60 DATA
61 CE
62 CL
63 DI
64 DO
65 WRQ
66 RES
67 DRF
68 VDD5
69 VSS
70 CONT3
71, 72 CONT2, 1
73, 74 PD01, 2
75 VVSS
76 PCKIST
77 VVDD
78 FR
79 LDS
80 LDD
I/O
— L channel D/A converter
—
O R channel D/A converter
—
—
O Crystal oscillator
I
7.35kHz synchronization signal output pin.
I/O
DF, DAC external clock input pin. (Not connected)
— Crystal oscillator
O C2 flag output pin.
O C1, C2 error correction monitor pin.
O 16.9344MHz output pin. (Not connected)
I
I Antishock mode
I
O
O Digital data output
O
I
I
I Microprocessor interface
O
O
Reset input pin.
I
This pin must be set low briefly after power is first applied.
O Focus ON detect pin.
— Microprocessor interface power supply pin.
— Digital ground pin.
I/O General-purpose output pin 3. (Not connected)
I/O General-purpose output pin 2, 1.
O Phase comparison output pin 1, 2 to control built-in VCO.
— Built -in VCO GND pin.
I PLL Resistor connection pin to set current for PD01 and 02 outputs.
— Built-in VCO power supply pin.
I Resistor connection pin to set the frequency range of built-in VCO.
I Laser power detection signal input pin.
O Laser power control signal output pin.
Description
L channel ground pin.
R channel ground pin.
R channel output pin.
R channel power supply pin.
Crystal oscillator power supply pin.
Connection for a 33.8688MHz crystal oscillator pin.
Crystal oscillator ground pin.
Must be connected to 0V.
L/R clock input pin.
Bit clock input pin.
L/R channel data input pin.
L/R clock output pin. (Not connected)
Bit clock output pin. (Not connected)
L/R channel data output pin. (Not connected)
Chip enable signal input pin.
Data transfer clock input pin.
Data input pin.
Data output pin. (Nch open drain output)
Interruption signal output pin.
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