National Instruments NI 653 Series User Manual page 59

Note
For data transfers that use a hardware start trigger, there is no mandatory setup (t
or hold time (t
during, or after the REQ edge. If STARTTRIG is asserted too close to the REQ edge, it may
not be recognized until the next REQ edge. To avoid this uncertainty, you can observe an
optional setup time of 15 ns; in other words, assert STARTTRIG at least 15 ns before the
start of the REQ pulse.
REQ
Data Valid
(Output Mode)
Data Valid
(Input Mode)
Parameter
t
c
t
hw
t
p
t
su
t
h
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) for the STARTTRIG (ACK) signal. It can be asserted at any point before,
h
The STARTTRIG signal is synchronized to the REQ edge using a flip-flop.
Because of this synchronization flip-flop, there is a one REQ-pulse delay
after STARTTRIG before the data capture begins. A two-cycle delay is
possible if you do not observe the optional setup time mentioned in the
preceding note.
t
hw
20 ns Min
t
su
10 ns
Min
Cycle time
Width of low pulse
Propagation time to valid output data
Setup time
Hold time
Figure 3-2. External Request Timing Diagram
t
c
50 ns Min
t
w
20 ns Min
t
p
30 ns Max
t
h
20 ns
Min
Description
3-3
Chapter 3 Timing Diagrams
NI 653X User Manual
)
su