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IC
TC74HC4538AF (TOSHIBA) FLAT PACKAGE
C-MOS DUAL RETRIGGERABLE/NON-RETRIGGERABLE MONOSTABLE
MULTIVIBRATOR
— TOP VIEW —
V
DD
1-C
1
16
(+2 V to +6 V)
1-CR
2
15
2-C
1-RD
3
14
2-CR
1-CK
4
13
2-RD
1-CK
5
12
2-CK
1-Q
6
11
2-CK
1-Q
7
10
2-Q
8
GND
9
2-Q
1
2
15
14
C
CR
C
CR
6
10
Q
Q
4
12
5
11
7
9
Q
Q
RD
RD
3
13
RETRIGGERABLE M. M. V
V
V
DD
DD
Q
Q
V
DD
Q
Q
RD
RD
V
V
DD
DD
TC74HC573F (TOSHIBA) FLAT PACKAGE
C-MOS 3-STATE OUTPUTS OCTAL LATCHES
- TOP VIEW -
1
V
20
OE
DD
IN
2
19
D1
Q1
IN
OUT
D2
3
18
Q2
IN
OUT
D3
4
17
Q3
IN
OUT
5
16
D4
Q4
IN
OUT
D5
Q5
IN
6
15
OUT
D6
7
14
Q6
IN
OUT
D7
8
13
Q7
IN
OUT
D8
9
12
Q8
IN
OUT
CK
10
11
IN
GND
NOTE :
TYPE
V
DD
AC
+ 2 to + 6V
HC
ABT
+ 5V
ACT
HCT
+ 2 to + 5.5V
TC74AC573
4-8
V
V
DD
DD
C
R
C
R
1
2
15
14
6
10
Q
Q
4
12
5
11
7
9
Q
Q
RD
RD
3
13
OUTPUT PULSE WIDTH = k · C · R
0.74
0.72
0.70
0.68
0.66
0.64
0.62
2
3
4
5
V
POWER SUPPLY VOLTAGE (VOLTS)
DD
NON-RETRIGGERABLE M. M. V
V
V
DD
DD
Q
Q
Q
Q
RD
RD
V
V
DD
DD
INPUT
OUT
2
19
D1
Q1
OE
CK
D
Q
3
18
D2
Q2
4
17
0
1
1
1
D3
Q3
0
0
0
5
16
1
D4
Q4
0
0
X
Qo
6
15
D5
Q5
1
X
X
HI-Z
7
14
D6
Q6
8
13
0
; LOW LEVEL
D7
Q7
9
12
1
; HIGH LEVEL
D8
Q8
11
X
; DON'T CARE
OE
HI-Z ; HIGH IMPEDANCE
Qo
; NO CHANGE
1
D1
Q1
D2 Q2
D3 Q3
D4 Q4
D5 Q5
D6 Q6
D7 Q7
2
19
3
18
4
17
5
16
6
15
7
14
8
13
D
Q
OE
11
CK
1
OE
TC7S00F (TOSHIBA) CHIP PACKAGE
C-MOS 2-INPUT NAND GATE
— TOP VIEW —
(SCALE 6/1)
1
5 V
A
DD
B
2
GND 3
4
TYPE
7S00F
7S00FU
4S11F
4SU11F
7SH00FU
TC7W02F (TOSHIBA) FLAT PACKAGE
6
C-MOS DUAL 2-INPUT NOR GATE
—TOP VIEW—
(+2 to +6V)
1A
1
8
V
DD
1B
2
7
2Y
3
6
4
GND
5
TC7W08FU (TOSHIBA) CHIP PACKAGE
C-MOS 2-INPUT AND GATE
(SCALE 3/1)
—TOP VIEW—
1
8 V
DD(+2 to +6V)
2
7
3
6
GND 4
5
D8
Q8
9
12
D
Q
OE
TC7W74FU (TOSHIBA) CHIP PACKAGE
C-MOS D-TYPE FLIP-FLOPS WITH DIRECT SET / RESET
—TOP VIEW—
(SCALE 3/1)
—TOP VIEW—
V
DD
1
8
(+2 to +6V)
2
7
6
3
GND 4
5
2
A
4
Y
=
Y
1
B
Y = A • B = A + B
A
B
Y
0
0
1
0
1
1
1
0
1
0
;
LOW LEVEL
1
1
0
1
;
HIGH LEVEL
V
DD
+2 to +6 V
+3 to +18 V
+2 to +5.5 V
A
A
Y
Y =
B
B
Y = A + B = A • B
1Y
A
B
Y
2B
0
0
1
0
1
0
2A
1
0
0
0 ; LOW LEVEL
1
1
0
1 ; HIGH LEVEL
1
A
7
A
2
Y =
Y
B
B
5
3
6
Y = A • B = A + B
A
B
Y
0
0
0
0
1
0
1
0
0
0 ; LOW LEVEL
1
1
1
1 ; HIGH LEVEL
7
SD
2
5
Q
D
1
3
Q
RD
6
INPUTS
OUTPUTS
S
R
CK
D
Qn+1
Qn+1
D
D
0
1
X
X
1
0
1
0
X
X
0
1
0
0
X
X
1
1
1
1
1
1
0
1
1
0
0
1
1
1
X
Qn
Qn
0 ; LOW LEVEL
1 ; HIGH LEVEL
X ; DON'T CARE
CNU-500
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