Schematic Diagram - Dac Board - Sony SS-CM90 Service Manual

6-31. SCHEMATIC DIAGRAM – DAC Board – •
R312
FB304 100
Q302
2SA1037AK
B+ SWITCH
R310
10k
D/A CONVERTER
R309
2.2k
IIS-
OUT-BCK
R308
10k
PLL-SEL
SEL-
STATIC
R307
IIS-OUT-SD
10k
IIS-OUT-WS
NC
TEST2
NC
R320
0 NC
C310
PREEM-OUT0
0.1
VDDE
TEST3
FB303
C309
100
6.3V
C308
0.1
•
See page 82 for Waveforms. See page 85 for IC Block Diagram.
R313
1k
C312 C313 C315
0.1 0.1 0.1
Q303
C316
SRC1202S
47
C311 16V DATA SELECT
100
SWITCH
6.3V
VOUTR
LOCK
SPDIF-SEL
IIS-EXT-SEL
VOUTL
IC302 VDDA(DAC)
µDA1350AH
SPDIF1
SPDIF0
NC
SELCHAN
MUTE
C319
0.001
C307 R316 R315
0.1 0 0
C306
100
6.3V
FB300
Q306,307
R305 R327
0 PLL LOCK DETECT 100
R326
C317 10k
0.1
C318
47
R304 0 16V R323
Q307
2.2k
2SA1037AK
FB302 D303
1SS355TE-1
Q306
R328 SRC1202S
0
C305
JR311
0.47
0
50V
C301 C320
0.1 0.1
R329
100k
59 59
INVERTER
IC301
TC7WU04FU
C330
330p
R303
FB301 100 FB306
FB307
D304
1SS355TE-17
FB308
FB309
FB310
D305
1SS355TE-17
FB311
FB313
FB314
FB315
FB316
C302 R319 FB317
100
6.3V FB318
FB319
FB320
FB321
FB322
• Voltages and waveforms are dc with respect to ground
under no-signal conditions.
no mark : DVD PLAY
HCD-M90
CN300
5P
BCK
(Page 48)
LRCLK
SDATA
DGND
SPDIF
(Page 55)
CN301
13P
PLLPWR
MUTE-IN
DINSEL
PLL-LOCK DETECT
DAC_RESET
(Page 71)
SYS 3.3V
DOUT
DGND
LOUT
AGND
ROUT
(Page 73)
A3.3V