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Panasonic TH-42PX20U-P Service Manual page 266

High definition plasma television gph6du chassis
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FPGA CONTROL DATA
RESET
47
IC9456
4
12
RESET
FLASH MEMORY
M
(32M ROM)
Plasma
AI control
/F
FLASH ROM I/F
DATA DRIVER
LK
IC9455
NEW PLASMA AI
10bit PROCESSOR
SUB-FIELD PROCESSOR
F
(L Master) SLV44h
DATA DRIVER
FLASH ROM I/F
/F
DATA DRIVER
LK
IC9305
NEW PLASMA AI
10bit PROCESSOR
SUB-FIELD PROCESSOR
(R Slave) SLV42h
DATA DRIVER
CONTROL DATA
UEH, USL, USH, UML, UMH, NUEL, UBK
SUS
IC9605
(2/2)
CL, CLK,SIU, SID, SCSU, CPL CPH
SCAN
DISCHARGE
CONTROL
DRVRST
100
CLE, CBK, CSL, CSH, CML, CMH, PCU
NTROL DATA
SCAN
X9702
X IN
22
X OUT
23
9,216MHz
41
26
28
IC9709
62
(2/2)
64
SUB MPU(CONVERTER)
1
RESET
19
44
RUSH ON/OFF
45
TV ON/OFF
46
M POWER
47
37
63
33
53
54
SCL3
SDA3
102
IC9608
FPGA CON.
BUS RELEASE
62
68
2OE
55
Q9400
1OE
56
BUS RELEASE
IC9459
BUS SW
CEL
CER
BLKL
BLKD
HZ
SUSTAIN CON. DATA 8bit
SCAN CON. DATA 13bit
SCAN CON. DATA 13bit
Q9301
LED G
REMOCON
LED R
KEY
IC9710
SOS2
SOS1
RESET
STB 5V
6
7
KILL SOS
FAN SOS
PS SOS
ALL OFF1
STB5V_M
LED G
LED R
KEY
REMOCON
IC9601
BUFFER
IC9603
BUFFER
IC9604
BUFFER
DRVRST
DRVRST-5V
STB5V_S
Q9702
Q9701
TH-42PX20U-P D-BOARD (2 of 2) BLOCK Diagram
TO C2-BOARD
C21
D32
Q9597
Q9596
B3
DRVRST-5V
CEL
A15
BLK
B14
DRVRST
A3
DATA DRIVE
L-UP
TO C3-BOARD
C31
D33
Q9591
Q9594
DRVRST-5V
A38
B26
CEL
A27
PCL
B37
A37
DATA DRIVE
A35
L-DOWN
A36
A33
DRVRST
TO C1-BOARD
C11
D31
Q9599
Q9598
B3
DRVRST-5V
A19
CER
BLKL
A16
DATA DRIVE
R-UP
A3
DRVRST
TO C4-BOARD
D34
C41
Q9593
Q9592
DRVRST-5V
A38
AP_HZ
B26
B38
DRVRST
DATA DRIVE
R-DOWN
TO SC-BOARD
D20
SC20
SCAN
OUT
SOS1
11
12
SOS2
TO P-BOARD
D27
P27
RUSH ON/OFF
RUSH ON/OFF
1
TV ON/OFF
2
TV ON/OFF
M POWER
3
M POWER
STB5V
4
STB5V
KILL SOS
5
KILL SOS
FAN SOS
6
FAN SOS
PS SOS
PS SOS
7
ALL OFF1
8
ALL OFF1

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