Power Block Diagram - Panasonic LUMIX DMC-GF6K Series Service Manual

12.6. Power Block Diagram

TOP P.C.B.
P8001
F8001
FP8001 FP9001
BAT+ 1
10-17
TO
FP8001
BAT THERMO 2
BATTERY
8
CATCHER
BAT DET(NC) 3
CC8002
FP8001
BAT- 4
1-7
FP8001 FP9001
21
POWER SW
S8001
IC6001
(VENUS ENGINE)
CL6201
AA1
(PW DDR1.2V CA1)
DDR VDD2
AF24 IC6007
DDR VDDIOCKE Y13 (REGULATOR)
W7
4 VOUT GND 1
DDR VDDQ
Y11
AA22
3 VIN 2
CE
DDR VDDDQ
AD26
IC6006
CL6202 (REGULATOR)
A3
(PW DDR1.8V CA1)
DDR VDD1 1 VOUT
IC6008
E6
(REGULATOR)
2
4 VOUT GND 1
PW DDR1.8V 3 VIN 2
CE
IC9102
(SYSTEM IC)
(POWER SW IN)
GPIO95 C2 106 POWERSWONH
CL6021
(SYS RESET)
RSTB AA26 54 RESETOUT
X9101
(32.72kHz)
43 OSCIN
42 OSCOUT
DACOUT0 67
POWERSWONL
(SW UNREG)
POWER
ADO IN7 B15 58 SW UNREG
CTL SW
POWERONH 51
(BAT THERMO)
ADO IN2 A14
(POWER ON H)
GPIO60 W4
(G I2C CK)
GPIO48 AD22
(G I2C DAT)
GPIO50 AD21
MCK24O
A9
X6001
(24MHz)
MCK24I A8
CL1001
(UNREG)
9-16
(BAT THERMO)
FP9001
7
F1002
FP9001 CL9004
1-6
(POWER ON L)
20
IC6005
(REGULATOR)
1 VOUT VCC 4
2 GND 3
CE
IC6004
(LOGIC IC)
1
6 CLR CK
VCC 4
5 VCC GND 2
3 4 Q D 3
GND CE
QR6201
(DFF CLR)
PIOC2 87
(DFF D)
84
PIOB7
(DFF CK)
PIOB5 82
(PW UNREG SYS)
IC9103
(REGULATOR)
6
1 VIN CE
CL9101
2 NC 5
VSS
(EVR 3V)
3 VOUT NC 4
EV3 45
(DDR1.8V ON H)
PIOC5 90
(DDR1.2V ON H)
PIOC7 108
CL1007
(LCD BL DAC)
CL1002
50
(POWER CTL SW)
55
CL1005
(LCD BLT)
PIOC1
86
CTL SEQ3
CL1003 CTL SEQ2
CTL SEQ1
IC1001
(7CH SW REGULATOR)
VO1
4
HVREG
DRIVER
CH1
STEP DOWN DC/DC
VREGD
(Current mode)
DRIVER
ERROR AMP1
SERIAL I/F
VO2
5
HVREG
DRIVER
CH2
STEP DOWN DC/DC
VREGD
(Current mode)
DRIVER
ERROR AMP2
SERIAL I/F
VO3
6
HVREG
Vo3SEL
DRIVER
CH3
STEP DOWN DC/DC
VREGD
(Current mode)
DRIVER
ERROR AMP3
SERIAL I/F
VO4
7
HVREG
DRIVER
CH4
STEP DOWN DC/DC
VREGD
(Current mode)
DRIVER
ERROR AMP4
SERIAL I/F
VO5
8
HVREG
DRIVER
CH5
STEP DOWN DC/DC
VREGD
(Current mode)
DRIVER
ERROR AMP5
SERIAL I/F
VO6
9
HVREG
DRIVER
CH6
STEP DOWN DC/DC
VREGD
(Current mode)
DRIVER
ERROR AMP6
SERIAL I/F
INV7
32
VREGD
CH7 DRIVER
STEP UP DC/DC
ERROR AMP7
0.3V (Current mode)
SHUTDOWN
SERIAL I/F
SS TIMER
OVPCOMP
PROTECTION
SCP6
UVLO
TIMER
LDO
SCP
TIMER
VREGD2
SCPLDO
13
TIMER CP
14 DRIVER
ON/OFF
LOGIC
16
CTL1234
17
SCL
18
SERIAL
SDA
I/F
OSC
19
12 21 26 29 27
SEQ
RT VREGD2 VREGA
61
Hx1
61
Hx1
62
Lx1
63
Lx1
64
PGND1
59
PGND1
60
Hx2
57
Lx2
58
PGND2
56
Hx3
54
Lx3
55
PGND3
52
PGND3
53
Hx4
49
Hx4
50
Lx4
51
PGND4
48
Hx5
44
Hx5
45
Lx5
46
IC1071
Lx5
47
(STEP DOWN CONVERTER)
PGND5
42
VIN
PGND5 5
43
THERMAL
Hx6 EN
38 4
SHUTDOWN
Hx6
39
REFERENCE
Lx6
MODE
40
0.6V VREF
2
Lx6
41
PFM COMP.
PGND6
+1% VOLTAGE
36
POSITIONING
PGND6
37
FB
Lx7
VREF
35
+1%
GND ERROR
PGND7 PWM
6
34 AMP
COMP.
VREF
VO7
33
SOFT START
VOUT RAMP
CONTROL SAWTOOTH
GENERATOR
VINREG
30
VINREG
31
REGOUT
22
VDD
10
VREGD2IN
28
HVREG
25
CPLUS
23
C P SW
VBAT
2
VBAT
VREGD
3
CMINUS
CP SW 24
QR1701
VCC
1
VREGA
4 3
GND
20
VREGD
5 2
VREGD
6 1
CL1101
PW D1.1V
CL1201
PW D3.0V
IC1061
(REGULATOR)
1 CNT VDD 4
CL1061
2 GND VOUT 3 PW DDR1.8V
CL1301
PW DDR1.2V
CL1401
PW D3.5V
IC1051
(REGULATOR) CL1051
4 VIN VOUT 1 PW A3.1V
3 CE VSS 2
IC9001
(REGULATOR) CL9008
4 VIN VOUT
1 WiFi D3.2V
(To FP9005-24,25)
3
CE GND 2
CL1501
PW D4.5V
UNDERVOLTAGE
LOCKOUT 1.8V
CURRENT
LIMIT COMP.
LIMIT
HIGH
CL1071
SIDE
GATE
LX
DRIVER
1 PW D1.8V
CONT. ANTI-
STAGE SHOOT-
THROUGH
LIMIT
LOW
SIDE
CURRENT
LIMIT COMP.
2.25MHz
OSC
FB
3
CL1072
PW CPOUT
(To Q3072-1,3)
CL1601
PW LEN4.2V
CL1801
PW HDMI5V
CL1701
F9001
PW BL18V
(To FP9008-5)
CL1702
LCD BL MINUS
(From FP9008-6)
DMC-GF6 POWER BLOCK DIAGRAM