Lsi/Ic Data; Mb87A908A (System Lsi / U3) - Casio A-10 Operation, Service Manual & Parts List

LSI/IC DATA

MB87A908A (SYSTEM LSI / U3)

N o . Pin Name
1 VDET3B
2 VDETS
4 VDET2R
5 A1
6 A2
7 A3
8 A4
9 A5
10 A6
11 A7
13 A8
14 A9
15 A10
16 A11
17 A12
18 A20
19 A21
20 A22
21 A23
23 A24
24 A25
25 PCMIREQB
26 PCMWAKEB
27 CE0ROMB
28 CE1ROMB
29 OEROMB
30 FlSHRTB
31 PRESETB
33 CASLHB
34 CASLLB
35 RASB
36 RDB
37 WRHB
38 WRLB
39 RDWRB
40 CS0B
41 CS4B
42 TEST1
43 TEST2
44 TEST3
45 D0
46 D1
48 D2
49 D3
50 D4
51 D5
52 D6
53 D7
54 D8
55 D9
57 D10
58 D11
59 D12
60 D13
61 D14
62 D15
63 CAS0LB
I n / O u t Pull-Up/Down
I
I
I
I/O Down
I/O Down
I/O Down
I/O Down
I/O Down
I/O Down
I/O Down
I/O Down
I/O Down
I/O Down
I/O Down
I/O Down
I/O Down
I Down
I Down
I Down
I Down
I Down
I
I
O
O
O
O
O
I
I/O
I/O
I Up
I/O Up
I/O Up
I/O Up
I Up
I Up
I
I
I
I/O Down
I/O Down
I/O Down
I/O Down
I/O Down
I/O Down
I/O Down
I/O Down
I/O Down
I/O Down
I/O Down
I/O Down
I/O Down
I/O Down
I/O Down
I/O Down
O
Function
Battery detecting signal (Off)
Backup battery detecting signal (Message) Q37 (Detector)
NiMH detecting signal (Off)
Address
Address
Address
Address
Address
Address
Address
Address
Address
Address
Address
Address
Address
Address
Address
Address
Address
Address
Interrupt signal to PCMCIA
Wake-up signal to PCMCIA
Chip select
Chip select
Output enable
Reset signal for Flash
Reset signal
CASLH signal to CPU
CASLL/OE signal from CPU
RAS/CE signal for CPU
Read signal from CPU
WE1 signal from CPU
WE0 signal from CPU
RD/WRB signal from CPU
CS0 signal from CPU (ROM)
CS4 signal from CPU (SYSTEM LSI)
Test pin
Test pin
Test pin
Data bus
Data bus
Data bus
Data bus
Data bus
Data bus
Data bus
Data bus
Data bus
Data bus
Data bus
Data bus
Data bus
Data bus
Data bus
Data bus
CAS signal for DRAM
— 22 —
To/From
Q52 (Detector)
Q2 (Detector)
GA
GA
ROM
ROM
ROM
GA
CPU
CPU
CPU
CPU
CPU
CPU
CPU
CPU
CPU
DRAM