Squelch; Buffer Amplifier; Bandpass Filter; Noise Detector - Ericsson 19D902783G1 Maintenance Manual

LBI-39123E
21.4 MHz IF MODULE - BLOCK DIAGRAM
2

SQUELCH

Buffer Amplifier

Integrated circuit U6.4 is configured as a unity gain buffer
amplifier. It provides a high input impedance to minimize load-
ing of the previous circuits.

Bandpass Filter

The audio frequency bandpass filter consists of U7.1 and its
associated circuitry. The purpose of this filter is to reject all
voice frequencies and allow only demodulated noise to pass.
The functioning of the squelch circuit depends upon the pres-
ence or absence of this noise. (When a signal is being received,
i.e. the receiver is quiet, the squelch circuit senses the absence
of noise and unsquelches the radio.)

Noise Detector

U7.2 along with associated components act as a noise de-
tector. The rectified output of U7.2 charges C11/C44 to a
nearly constant DC voltage.

DC Amplifier

U7.3 is configured as a basic amplifier with a gain of 3.

Schmitt Trigger

U7.4 is configured as an amplifier with positive feedback.
This arrangement provides hysteresis in the output versus input
characteristic. This eliminates the possibility of the squelch cir-
cuit repeatedly cutting in and out when the input signal is near
a threshold. R56 and R57 act as a voltage divider to provide a 5
volt logic level output. (Logic High = unsquelched)

FAULT DETECTOR

U4 and U5 are voltage comparators. These are configured
into four "window detectors" which sense the presence of volt-
ages within specified ranges (windows).
The four window detector circuits are U4.1 & U4.2, U4.4
& U4.3, U5.1 & U5.2, and U5.4 & U5.3. These monitor DC
operating voltages on U6.2, U1, Q2, and U3 respectively. R29
and R30 comprise a voltage divider to provide a 5 volt logic
level output. A fault is indicated when the output drops to zero.
Diode D1 and transistor Q3 monitor the output of the 8V
regulator. DI is a 8.2 volt breakdown diode. If the regulator
output voltage should rise above 8.9 V (8.2 + 0.7 base-emitter
drop) Q1will turn on and a fault will be indicated.
Transistors Q4 and Q5 are drivers for the front panel LED
CRI. These are powered from the +13.8 Vdc line before the 8V
regulator. Therefore, if the regulator opens, a fault will still be
indicated.

VOLTAGE REGULATOR

U8 is a monolithic integrated-circuit voltage regulator pro-
viding 8 Vdc. This powers all circuitry in the module with the
exception of Q2, the front panel LED and its drivers.

ADDRESS DECODER

The address decoder consists of U2, an 8-stage shift regis-
ter, and U9, a BCD-to-decimal decoder. When A2, A1 and A0
are '1', '1', '0', respectively and the ENABLE line is high, Q7
on U9 goes high. This enables data input to U2 to propagate
through it, controlled by the clock pulses on U2-3. When the
ENABLE signal goes low, U9-4 goes low, and the shift-register
outputs are latched. Q1 on U2 is then high for the 12.5 kHz
mode, and low for the 25 kHz mode.

MAINTENANCE

RECOMMENDED TEST EQUIPMENT

The following test equipment is required to test the IF
Module.
1. FM Signal Generator; HP 8640B, HP 8657A, or
equivalent
2. AF Generator or Function Generator
3. Audio Analyzer; HP 8903B, HP 339A, or equivalent
4. Oscilloscope
5. Frequency Counter; Racal-Dana 9919 or equivalent
6. DC Meter for troubleshooting
7. Power Supply; 13.8 Vdc @ 150 mA
8 Power Supply; 12 Vdc @20 mA

ALIGNMENT PROCEDURE

1. Apply 13.8 Vdc and 12 Vdc supplies to module.
2. Verify 13.8 V DC current consumption is between 90
and 150 mA, and 12 Vdc current is between 12 and 18
mA.
3. Verify fault output is 0 to 0.5 Vdc and front panel LED
is off.