Sharp CD-ES900 Service Manual page 75

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IC1 VHiLC78648E-1: CD Digital Signal Processor (LC78648E) (2/2)
Pin No.
Terminal Name
Input/Output
44
RCHO
45
RVDD
46
XVSS
47
XOUT
48
XIN
49
XVDD
50
IOMODE
51
F16MIN
52*
OUT1
53*
16MOUT
54
ASLRCK
55
ASDACK
56
ASDFIN
57*
LRSK
58*
DATACK
59*
DATA
60
DVDD
61
DVSS
62
CE
63
CL
64
DI
65
DO
66
WRQB
67
RESB
68
DRF
69
C2F/SBCK
70
CONT6/SBCK
71*
MONI5
72*
MONI4
73*
MONI3
74
CONT5
75
CONT4
76
PDO1
77
PDO2
78
PCKIST
79
VVSS
80
VVDD
In this unit, the terminal with asterisk mark (*) is (open) terminal which is not connected to the outside.
The same potential must be supplied to all power supply pins, i, e., AVDD1, AVDD2, XVDD, DVDD, LVDD and RVDD)
Setting in Reset
Output
RVDD /2
Input
Output
Oscillator
Input
Oscillator
Input
Input
Input
Output
L
Output
CLK
Output
Input
Input
Input
Output
L
Output
L
Output
L
Input
Input
Input
Input
Output
(H)
Output
L
Input
Output
L
Input/Output
Input
Input/Output
Input
Output
L
Output
L
Output
L
Input/Output
Input
Input/Output
Input
Output
Output
Input
Input
Right channel
R channel Power supply pin.
D/A converter
R channel output supply pin.
Digital GND pin. Must always be connected to 0 V
Power supply for crystal oscillator.
Crystal
Connected for a 16.9344 MHz crystal oscillator pin.
oscillator
Digital power supply pin. Must always be connected to 0 V
CONT4 to 6. MONI3~5, DRF, WRQB pin output mode switching input pin.
"L" setting: Normal output "H" setting: Nch open drain output
DF. DAC external clock input pin.
General-purpose output pin 1.
16.9344 MHz output port.
Left/Right clock input pin.
(Must be connect to 0 V when unused.)
Bit clock input pin.
Anti-shock
(Must be connect to 0 V when unused.)
Left/Right channel data input pin.
(Must be connect to 0 V when unused.)
Left/Right channel data output pin.
Digital data
Bit clock output pin.
output
Left/Right clock output pin.
Digital power supply pin.
Digital GND pin 2. Must always be connected to 0 V.
Chip enable signal input pin.
Data transfer clock input pin.
Microcomputer
Interface
Data output pin.
Data output pin. (Try state output.)
Interruption signal output pin.
Reset input pin for LSI.
This pin must be set LOW briefly after power is first applied.
Focus ON detection pin.
Error flag monitor pin, or sub code
read clock input pin.
General-purpose I/O pin 6, or sub
code read clock input pin.
Internal signal monitor pin 5.
Internal signal monitor pin 4.
Internal signal monitor pin 3.
General pur-
Controlled by command from the microprocessor. Any of
pose I/O pin 5.
these that are unused must be either set up as input pin
ports and connected to 0 V, or set up as output pin ports and
General pur-
left open when unused.
pose I/O pin 4.
Phase comparison output pin 1 to control built-in VCO.
Phase comparison output pin 2 to control built-in VCO.
Resistor connection pin to set current for PDO1 and 02 out-
PLL
puts.
Built-in VCO GND pin. Must always be connected to 0 V.
Built-in VCO power supply pin.
8 – 2
CD-ES900/CD-ES99
Function
Controlled by commands from the micro-
processor.
Controlled by commands from the micro-
processor.
Any of these that are unused must be either
set up as input pin ports and connected to 0
V, or set up as output pin ports and left
open.

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