JVC GR-AX880US Service Manual page 66

CAMERA AND Y/C SYSTEM BLOCK DIAGRAM (2/2)
C
a V_PB_C
BUF
BUF
Y
D/A
BUF
CONV
B-Y
D/A
BUF CLAMP MOD
CONV
R-Y
D/A
BUF CLAMP
CONV
LPF
SUB CARRIER
MODULE
FM
A/D HPF
DEMO
DO
DET
C_SYNC B
I/F
Y
REC
REC_Y
SYNC
Y :8bit
ADD
C :4bit
PB PB_C C
(Y+C) HPF
10bit
CBI
DICK
NRBIN
C
BURST ADD
P.BURST ADD
NRB_OUT
C
CPO0
I/F
CPO3
DOCK Y
2FSC
18
IC4001(DSP)
IC4701
DA_R 168
(V OUT)
DA_B
147
Y/C
TO LCD/CVF
MIX
DA_G 169
6
TO BW/CVF
BWY0
146
BWYOUT
Q4701 BUF
Y
YOUT 160 CAM_Y
CAM_C C
COUT 161
+ BLK
LIM
MOD
PBFMI (AINT) 220
FROM
CPU
SVHSOUT 139 S_DET_L
Y Y
FB
CLAMP
Y
REC
N.L EMPH S_ET
S DET
Y
Y REC SUB EMPH LPF
D. E
LPF YNR
N.L DE_EMPH
SUB DE_EMPH PB
Y
REC PB
Y
Y Y
REC PB REC PB FF
CLAMP
CHROMA
LOGIC
SYNC
SEP
Y
Y
CLIP
C
PB
REC
ACC C
LPF
C C
HiFi
REC PB
TRAP
C
ACC C
DECODER
DET COMB
C BURST
ENCODER EMPH
Chroma
APC
Logic
DET
MUTE C
GAIN BURST L
P.BURST
CTL CNR
DE_EMPH
ERASE
JIG_CONN.
CN25
Y+C
Y
C
2 12 15 9
∗
IC4702
Y/C MIX
&6dB AMP (V OUT)
IC3501
4
2 7
(ASP)
BUF
Q4702
PB_C
C C
21
V_PB_C
PB_FM
V PB F 25
G. EQ P. EQ
∗
Q3505
V_REC_C
S_DET+ 19 REC_C
SW
C
V_REC_F
Y
20 REC_FM
D/A
LPF
Y
SCK3 31 CLK
SO3 32 DATA SERIAL
V_ASP_CS LOAD I/O
33
2FSC 28
2FSC
1/2
27 CR DET
C3514
MAIN EMPH
Y Y
W/D CLIP REC_FM OUT 211
FM GAIN
D/A
MOD CTL
MAIN
DE_EMPH
Y
H SW
PC1
LNC GAIN
NC/PC2 ∗
MUTE I/F
PBYNR CTL
D4001
∗
DOCK
Q4001
C SYNC 179
SW
FROM CPU
V_PLS_ON
C C
REC_C OUT 212
GAIN
MUTE D/A
CTL
FSC2OUT 239
2-55 2-56
CH2
PB AMP
SW
CH4
PB AMP
C
A/D
LPF
LPF
CH1
PB AMP
FM
TRAP
AGC
CH3
PB AMP
CH2
CURRENT
AMP
SW
CH4
CURRENT
C C
REC_C AMP
EQ
BUF
+
Y Y Y
LPF HPF TRAP
CH1
CURRENT
AMP
CH3
CURRENT
AMP
CR
V_REC_F
S_DET_L
S_DET+
V_REC_C
2FSC
J504
A/V OUT
Y+C 2
1
1
Y
3
J505
Y
C 4
C
S OUT
2
CN5
Q3502
13
4
CH2_S
12
CT
CH2
SW2
5
CH2_F
Q3502
10
6
CH4_S
CT 9
CH4
SW4
7
CH4_F
Q3501
6
8
CH1_S
CT 5
CH1
SW1
9
CH1_F
Q3501
3
10
CH3_S
2
CT
CH3
SW3
11
11
CH3_F
R/T
8 VIDEO HEAD
4
1
NOTE)
∗
: For SVHS Model