Sony MHC-RG270 Service Manual page 62

HCD-GX355/GX555/RG270/RG475/RG575
• IC Pin Function Description
MAIN BOARD M30302MCP-A02FPU0 (SYSTEM CONTROLLER)
Pin No.
Pin Name
O-BD3401-
1
DATA
2
O-BD3401-CLK
3 O-VFD-RESET
4
O-VFD-CE
5
I-AC-CUT
6
I-VOL-A
7 I-SIRCS-IN
8
BYTE
9
CNVSS
XCIN
10
(32.768KHZ)
XCOUT
11
(32.768KHZ)
12
I-RESET
13 XOUT (16MHZ)
14
VSS
15
XIN (16MHZ)
16
VCC1
17 NMI
18
I-RDS-CLK
19
I-SCOR
20
I-AC-PULSE
21 I-VOL-B
22
O-STBY-LED
23
O-SYS-MUTE
24
O-STK-MUTE
25 O-SWR
O-POWER-
26
RELAY
O-FRONT-SP-
27
RELAY
28
O-MP3-CLK
29
I-MP3-DI
30 O-MP3-DATA
31
O-CD-DATA
32
I-CD-SENS
33
O-CD-CLK
34 O-XTCN
35
O-VFD-DATA
36
I-VFD-DATA
37
O-VFD-CLK
38 O-MP3-RESET
39
O-MP3-CS
40
I-MP3-ACK
41
xHOLD
60
I/O
O Serial data output to the electrical volume
O Serial data transfer clock signal output to the electrical volume
O System reset signal output to the FL/LED driver
O Chip enable signal output to the FL/LED driver
I AC power detection signal input terminal
I Jog dial pulse input terminal
I SIRCS signal input terminal
I Mode setting terminal Normally not used
I Mode setting terminal Normally not used
I Sub system clock input terminal (32.768 kHz)
O Sub system clock output terminal (32.768 kHz)
System reset signal input from the reset signal generator "L": reset
I
For several hundreds msec. after the power supply rises, "L" is input, then it changes to "H"
O Main system clock output terminal (16 MHz)
- Ground terminal
I Main system clock input terminal (16 MHz)
- Power supply terminal (+3.3V)
I Non-maskable interrupt signal input terminal
I RDS data transfer clock signal input terminal (AEP, UK, East European models)
I Subcode Q sync (SCOR) input from the CD DSP
I AC main power detection signal input terminal
I Jog dial pulse input terminal
O LED drive signal output terminal
O Muting on/off control signal output terminal
O Standby signal output to the power amplifier (for front speaker output)
O Relay drive signal output for surround output (GX555/RG475/RG575)
O Relay drive signal output for main power
O Power on/off control signal output for the fan motor and amplifier section
O Serial data transfer clock signal output to the MP3 decoder
I Serial data input from the MP3 decoder
O Serial data output to the MP3 decoder
O Serial data output to the CD DSP
I Internal status (SENSE) input from the CD DSP
O Serial data transfer clock signal output to the CD DSP
O Oscillator control signal output to the CD DSP
O Serial data output to the FL/LED driver
I Serial data input from the FL/LED driver
O Serial data transfer clock signal output to the FL/LED driver
O System reset signal output to the MP3 decoder
O Chip select signal output to the MP3 decoder
I Acknowledge signal input from the MP3 decoder
I/O Not used
Description