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14.23. D-Board (2 of 2) Block Diagram
IC9153
REG 5V
UNREG 14V
1
3
5V
IC9152
REG 3.3V
P5V
5
4
3.3V
B0-B7,G0-G7,R0-R7
B0-B7,G0-G7,R0-R7
IIC_CONT
RESET
SMM
TO J-BOARD
J3
REMOCON_OUT
FAN_CONT
STB_ON
POWER_STATUS
TXD_TU
RXD_TU
REAL TIME/INPUT
TXD_PC
RXD_PC
RESET
TO P-BOARD
P25
FAN CONT
TH-50PHD6/TH-50PHW6 D-BOARD Block Diagram (2 of 2)
IC9302
REG 3.3V
P5V
5
4
3.3V
UNREG 14V
UNREG 14V
D3
REMOCON_OUT
25
FAN_CONT
26
28
STB_ON
15
POW_STATUS
17
TXD_TU
19
RXD_TU
27
RTC_INT
21
TXD_PC
23
RXD_PC
11
RESET
D25
15V
1
15V
15V
2
15V
5V
5
5V
FAN_CONT
7
D
(2/2)
Plasma AI Sub-Field Processor
IC9800
1.8V
DC DC CONVERTER
UNREG 14V
(1.8V)
IC9952
1.8V
DC DC CONVERTER
(1.8V)
LEFT(MASTER)RGB 8bit
RIGHT(SLAVE)RGB 8bit
IC9703
3.3V->5V
9
11
IIC CONT
SMM
IC9707
OR
1
4
2
IC9951
3.3V
DC DC CONVERTER
(3.3V)
IC9453
2.5V
DC DC CONVERTER
(3.3V->2.5V)
IC9304
64M SDRAM
SDA2
132
SCL2
133
55
8
RESET
42
CABLE_DET
62
STB_ON
31
POW_STATUS
35
TXD_TU
14
RXD_TU
15
RTC_INT
IC9708
4
TXD_PC
51
EEPROM
RXD_PC
52
SDA
5
20
6
21
SCL
REMO OUT
Q9708
IC9454
R
64M SDRAM
FC RAM I/F
IC94
NEW PLA
10bit PRO
SUB-FIEL
(L Master)
FPGA I/F
FC RAM I/F
IC93
NEW PLA
10bit PRO
SUB-FIEL
(R Slave)
FPGA I/F
IC96
DISCHAR
CONTRO
IC97
SUB MPU
32
29
53
REMO INH
SCL3
79
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