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14.22. D-Board (1 of 2) Block Diagram
D
D-Board(1of2)Block Diagram
LVDS:Low Voltage Differential Signaling
TO J-BOARD
J6
D6
TX0-
2
TX0+
3
TX1-
5
TX1+
6
TX2-
8
TX2+
9
TX3-
14
TX3+
15
TXC-
11
12
TXC+
TO J-BOARD
J3
D3
Y S
40
PB S
38
PR S
36
HD
34
VD
32
NCLP
31
SCL1
SDA1
SCL1
4
SDA1
5
SCL2
6
SDA2
7
SCL3
8
SCL3
SDA3
9
SDA3
SMM
SOUND MAIN MUTE
12
CABLE DET
CABLE DET
13
TO J-BOARD
J5
D5
HD
27
VD
29
NCLP
31
Y
21
PB
23
PR
25
TX0-
2
TX0+
3
TX1-
5
TX1+
6
TX2-
8
TX2+
9
TX3-
14
TX3+
15
11
TXC-
12
TXC+
TH-50PHD6/TH-50PHW6 D-BOARD Block Diagram (1 of 2)
LVDS/TTL(PARALLEL)
9
10
11
12
15
16
19
20
17
18
IC9023
SDA2
5V->3.3V
SCL2
HS
17
3
VS
15
5
CLP
13
7
HS
2
18
VS
4
16
CLP
6
14
IC9711
SWITCHING
SCL2(IIC 5V)
SDA1(IIC 5V)
7
1
2
6
5
IIC_CONT
Q9719
3
5V->3.3V
Q9704
SCL2(3.3V)
5V->3.3V
Q9703
SDA2(3.3V)
SDA2
SCL2
SDA2
SCL2
IC9011
LVDS/TTL(PARALLEL)
IC9015
BUS SWITCH
9
1
10
R/G/B
27
11
12
55
15
16
19
CLK OUT
26
20
HD
HS OUT
3
17
VD
VS OUT
5
18
IC9002
IC9005
BUS SWITCH
OE
1
R/G/B
27
55
CLK OUT
26
HS OUT
3
VS OUT
5
IC9009
A/D CONVERTER(SUB)
PLL
B
Pb/B IN
43
CLP
110M
8BIT
G
Y/G IN
48
CLP
ADC
R
Pr/R IN
54
CLP
SDA2
57
SYNC/SEPA
SCL2
56
38
30
31
IC9019
A/D CONVERTER(MAIN)
B
Pb/B IN
43
CLP
110M
8BIT
G
Y/G IN
48
CLP
ADC
R
Pr/R IN
54
CLP
57
SDA2
SYNC/SEPA
56
SCL2
PLL
38
30
31
OE
IC9004
IC9003
SWITCHING
INVERTER
2
4
5
2
IC9008
67
BUS SWITCH
B(8Bit)
B0
12
B
OE
B7
19
G(8Bit)
G0
2
G
G7
9
R(8Bit)
R0
70
R
R7
77
VD
VS OUT
64
HD
HS OUT
66
IC9018
BUS SWITCH
B(8Bit)
B0
12
B
B7
19
G(8Bit)
G0
2
G
G7
9
R(8Bit)
R0
70
OE
R
R7
77
VD_M
VS OUT
64
HD_M
HS OUT
66
67
IC9013
IC9012
SWITCHING
INVERTER
2
4
5
2
Q9001
SW
3
CLKC
6
1
7
Q9002
SW
3
6
CLKB
1
7
78
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