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Raising the manual reverse line raises the reverse line.
while rewinding.
11. 8 READ PRE-AMPLIFIER 75. 06
To read from tape, a tap is taken off the read-write head in 75. 07 and tied to an
amplifier circuit 75.06.
the output is fed to a K x o
If the line is down (-30) the K x o *s biased below cut-off and the signal from the AT
does not get through. However, if the line is up (+10), the signal passes through and
emerges on the read-sync bus to the external circuitry.
plifier circuits.
The component circuit diagram of the AT is on C. 04. 04.
stage comes from the read head, and either a plus pulse or a minus pulse represents
a one bit.
The input pulses should be 35 to 40mv peak to peak.
The output of the cathode follower K x o should be 20 volts, peak to peak.
level should be set with the potentiometer controlling the feed back from the third
stage of the AT to the first.
11. 9
WRITING ON TAPE (ONLY ONE BIT POSITION CONSIDERED)
Reviewing briefly the operation of storing information on tape, remember that
the tape is magnetically saturated in a predetermined direction by passing current
through the read-write head in one direction.
control of information lines entering from the control circuitry.
is always flowing through the read-write coil in one direction or the other.
cuit for this is shown on 75. 07 and C. 01. 07.
The right and left outputs of a write trigger are fed to an 1^^.
cuits of this I^y£ are the two coils making up the R /W head.
outputs of the write trigger is always up, either one side or the other of the I ^
conducting, causing current to flow in the associated coil.
The write trigger is alternately turned on and off from the negative shift output
of a diode gate.
This diode gate is conditioned by the write bus that enters from the
external control.
The level of this bus represents the information to be written on
the tape.
The other input to the diode gate contains timed pulses that actually flip
the trigger.
These pulses are routed from 75. 02 where they are a combination of
''select, ready, and w rite ,'' and write pulses generated externally.
generated pulses are 67 usee apart and last for 8.4 usee in most system s.
The I^y^ is further controlled by an I
to conduct only when the write-status line is up.
as the right output of the re ad-write-status trigger conditioned by ''not file protection. "
It is at plate level, so a divider is used on the input to the I
write-status line is down (indicating read status) the I
IwR ^rom conducting on either side.
Remember that there are seven circuits such as the one described above, one for
each of the seven channels.
As the bits are read they are amplified in the AT circuit and
This circuit is controlled by ''select, ready, and read. "
The flow of current is reversed under
in the cathode circuit.
q
38
This is the method used
There are seven such am
The input to the first
Therefore, current
The plate c ir
Because one of the two
The externally
The I
q
This line was generated on 75. 02
on 75. 07. When the
q
is cut off, preventing the
q
This
The c ir
is
r
is allowed
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