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3-3. CN-2213 Board
Input/output connectors and user control switches are
mounted on the CN-2213 board.
3-4. PS-616 Board
1. Video signal processing block
After the video signal input from a camera is cut in a DC
level by C105, it is terminated by R105 (75 Z). The sync
signal of a camera controller is then canceled using an
operational amplifier (IC101). The resultant signal is
clamped by Q101 and amplified by IC102. After that, the
signal is output through a buffer to the VIDEO OUT A
connector.
2. Cable compensator circuit
The gain and frequency characteristics of IC102 are
switched to three levels by Q102, Q103, and Q104 when
the switch on the front panel is selected according to the
length of a cable.
3. 28.5 V REG and protection circuit
A switching power supply of 31 V is produced as a high-
impedance and stable output voltage of 28.5 V by Q108
and supplied to the camera together with a sync signal.
The current flowing through the camera is converted into a
voltage for detection by Q109. During overload and non-
load, flip-flop circuits (Q111 and Q112) are controlled
using a comparator (IC103), and Q107 is cut off by Q110
so as to stop the power supply to the camera. At that time,
the LED slightly lights by flip-flop circuits.
The flip-flop circuits during the power-on sequence are
controlled by C134 and Q113.
The operation points during overload and non-load are as
follows:
Overload: Approximately 380 mA or more
Non-load: Approximately 50 mA or less
3-2
4. Sync block
During PRIMARY setting
The output signal of IC501 is set "high", the 14.31818 MHz
(CE: 14.18750) signal from a crystal oscillator circuit is input
to IC504, and a VS/VD signal is output. The VS signal is
divided in resistance and sent to IC105 (2/3). The VD signal is
passed through a shift register (IC506) to determine the pulse
width using a monostable multivibrator (IC507) and sent to
IC105 (2/3).
A "high" or "low" signal is output according to the setting of a
PRIMARY/SECONDARY selector switch. Moreover, the
control terminal of IC105 (1/3) is controlled and a
superimposed sync signal is generated. A SYNC OUT signal is
output from IC105 (3/3) under the same control.
During SECONDARY setting
The external sync signal input from the SYNC IN terminal is
cut in a DC level for sync separation by C513. A VS signal is
output from IC508 and branched to two paths. One is sent
through a buffer (Q506) to IC104 (3/3). The other is sent to a
sync discriminator circuit. A VD signal is output from IC512
and branched to two paths. One is sent through a buffer (Q504)
to IC104 (2/3). The other is sent to a sync discriminator circuit.
If each input signal of a sync discriminator circuit is normal, the
output signal is set "high". The output signal is input to the gate
of AND circuit IC110. The resultant output signal is input to
the control terminal of multiplexer IC104 (2/3 and 3/3) to
discriminate whether the signal input from the SYNC IN
terminal is a VS or VD signal. Moreover, a "high" or "low"
signal is output according to the setting of the VS/VD selector
switch on the front panel. In this case, the control terminal of
IC104 (1/3) is controlled and the VS/VD setting is confirmed.
During PRIMARY setting, the same confirmation as above is
done by IC105 (2/3). No superimposed sync signal is output if
the signal from the SYNC IN terminal differs from the switch
setting on the front panel.
A "high" or "low" signal is output according to the setting of a
PRIMARY/SECONDARY selector switch. Moreover, the
control terminal of IC105 (1/3) is controlled and a
superimposed sync signal is generated. A SYNC OUT signal is
output from IC105 (3/3) under the same control.
3-5. SW-1073 Board
User control switches and LEDs are mounted on the SW-
1073 board.
YS-W270/W270P (E)
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