MSI 785G-E65 Series Manual page 60

Ms-7576 (v1.x) mainboard
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BIOS Setup
BIOS Setup
Advance DRAM Configuraton
Press <Enter> to enter the sub-menu and the followng screen appears.
DRAM Tmng Mode
Ths field has the capacty to automatcally detect all of the DRAM tmng. If you set
ths field to [DCT 0], [DCT 1] or [Both], some fields wll appear and selectable. DCT
0 controls channel A and DCT1 controls channel B.
CAS Latency (CL)
When the DRAM Tmng Mode sets to [DCT 0], [DCT1] or [Both], the field s adjust-
able. Ths controls the CAS latency, whch determnes the tmng delay (n clock
cycles) before SDRAM starts a read command after recevng t.
tRCD
When the DRAM Tmng Mode sets to [DCT 0], [DCT1] or [Both], the field s adjust-
able. When DRAM s refreshed, both rows and columns are addressed separately.
Ths setup tem allows you to determne the tmng of the transton from RAS (row
address strobe) to CAS (column address strobe). The less the clock cycles, the
faster the DRAM performance.
tRP
When the DRAM Tmng Mode sets to [DCT 0], [DCT1] or [Both], the field s adjust-
able. Ths settng controls the number of cycles for Row Address Strobe (RAS) to
be allowed to precharge. If nsufficent tme s allowed for the RAS to accumulate ts
charge before DRAM refresh may be ncomplete and DRAM may fal to retan data.
Ths tem apples only when synchronous DRAM s nstalled n the system.
3-22

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