Hardware Specifications And Configurations - Acer TravelMate 8200 Service Manual

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Hardware Specifications and Configurations

Processor
Item
CPU type
Package
Core voltage
Feature
Bus speed
On-die primary (L1)
cache
On-die second (L2)
cache
North Bridge: Intel
Item
Package
Power
Feature
South Bridge: ICH7M
Item
Package
Power
Feature
Chapter 1
Intel
Pentium
M Yonah processor (dual core)
®
®
Intel
497-pin Micro-FCPGA
®
• 1.2875V (highest frequency mode) to 0.8375V (low frequency mode)
• 0.75V (deeper sleep mode)
Intel
Architecture with Dynamic Execution, MMX and SpeedStep
®
Technology
AGTL system bus interface, 64-bit data bus, 533/667 FSB operation
32KB instruction cache and 32KB write back data cache
2048KB
945PM (Calistoga)
®
Micro-FCBGA 1466-pin
1.05V (core), 1.5V, VCCSM (DDR2 = 1.8V), 2.5V, 3.3V
• Processor host bus support
• Integrated SDRAM controller up to 4GB (2 SODIMM support)
Integrated SDRAM clock buffer to support 2 SODIMM
• External Graphics interface for PCI Express Architecture support
• DMI x 2 and DMI x 4 for connection between GMCH and ICH7M
BGA 652-pin
1.05V (core), 1.5V, 3.3V, 5V, CMOS I/O
• Upstream accelerated Hub architecture interface for access to GMCH
• PCI interface (six PCI Request/Grant pairs)
• Bus master IDE controller (support Ultra 33/66/100)
• Serial ATA (SATA) controller
• USB 1.1 and USB 2.0 host controller
• AC'97 2.3 interface
• Low Pin Count (LPC) interface
• IRQ controller
• Enhanced DMA controller, interrupt controller, timers, RTC
• Power management
Specification
Specification
Specification
39

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