Block Diagram - Cd Section - Sony SS-CEP515 Service Manual

HCD-EP515
6-1. Block Diagram – CD Section –
DETECTOR CD +5V
A
A
6
RF
SUMMING
B
B
AMP
7
C
C
8
FOCUS
D
ERROR AMP
D
9
F
F
11 F I-V AMP
E
TRACKING
E
10 E I-V AMP
ERROR AMP
OPTICAL PICK-UP
BLOCK
KSM-213EDP
LASER DIODE
Q101
LD
APC LD
AUTOMATIC
1
POWER AMP
CONTROL
PD LD
IC102
FOCUS/TRACKING COIL DRIVE,
SPINDLE/SLED MOTOR DRIVE
CH4OUTF
15
MOTOR CH4SIN
M
(SPINDLE)
CH4OUTR
DRIVE
16
CH3FIN
CH3OUTF
17
MOTOR
M
(SLED)
CH3OUTR CH3RIN
DRIVE
18
2-AXIS
DEVICE
CH2OUTR CH2RIN
11
COIL
CH2OUTF CH2FIN
DRIVE
12
CH1OUTR CH1RIN
13
COIL
CH1OUTF CH1FIN
DRIVE
14
MUTE
IC103
RF AMP,
FOCUS/TRACKING ERROR AMP
AC EQ
SUM IN RFAC
RFAC
4
3 EQ 15 51
VCA
49
FE
48
16
FEI
17
RFDCO
RF DC
28
AMP
RFDCI PWM3
29
TE
18
SW
12
PD
2
PWM2
25
40 41 39 43
IC101 (2/2)
DIGITAL SERVO
24
PROCESSOR
A/D
23
CONVERTER
SFDR
28
SRDR
29
TFDR
MIRR/DFCT/
6 30
FOK
TRDR
5 31
DETECTOR
FFDR
32
FRDR
33
3
TO SERVO INTERFACE
2
20
FILTER
IC101 (1/2)
DIGITAL SIGNAL PROCESSOR,
DIGITAL FILTER, D/A CONVERTER
54 56 53 55
16K
RAM
INTERFACE
RFAC EFM
ASYMMETRY DIGITAL
DEMODULATOR
CORRECTION PLL
ASYI
ASYO
ERROR
CORRECTOR
SUBCODE SERVO AUTO
DIGITAL SERVO
PROCESSOR SEQUENCER
CLV INTERFACE
CPU INTERFACE
26 3 14 5 7 6 8 20 1 2 9 21 27 64 15
S101
(LIMIT)
36 27 37 35
31 CD DATA
33 CD CLK
32 CD XLT
93 CD LDON
PWM2
9 CD PWM1
PWM3
10 CD PWM2
IC801 (1/2)
SYSTEM CONTROLLER
FOK
24
MIRR
22
DFCT
23
92 CD XRST
17 17
PCMD
62
BCK
D/A
63
LRCK
61
C2PO
19
AOUT1
PWM 70
SERIAL DIGITAL
&
IN FILTER,
AOUT2
INTERFACE INTEGRATOR
NOISE SHAPER
77
TO MIRR/DFCT/
FOK DETECTOR
DIGITAL CLOCK
OUT GENERATOR
18 60
+7V
Q102
Q317
+3.3V CD +5V
+7V
REG
REG
+5V
• Signal Path
: CD
CD
AIN1 LOUT1
71 72 L-CH
BUFFER A
AIN2 LOUT2
76 75
R-CH
MAIN SECTION
XTAI
66
TIMING
XTAO
X101
LOGIC
67
16.9344MHz