American Megatrends MB980 User Manual page 46

BIOS SETUP
PCI Express Configuration
Chipset
Main Advanced
PCI Express Configuration
PCI Express Clock Gating
DMI Link ASPM Control
DMI Link Extended Synch Control
PCIe-USB Glitch W/A
Subtractive Decode
► PCI Express Root Port 1
► PCI Express Root Port 2
► PCI Express Root Port 3
► PCI Express Root Port 4
► PCI Express Root Port 5
PCI-E Port 6 is assigned to LAN
► PCI Express Root Port 7
► PCI Express Root Port 8
PCI Express Clock Gating
Enable or disable PCI Express Clock Gating for each root port.
DMI Link ASPM Control
The control of Active State Power Management on both NB side and SB
side of the DMI link.
PCIe-USB Glitch W/A
PCIe-USB Glitch W/A for bad USB device(s) connected behind
PCIE/PEG port.
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Boot Security
Enabled
Enabled
Disabled
Disabled
Disabled
MB980 User's Manual
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