Pin No.
Pin Name
91
VSS
92
OVDDE2
93 to 95
QR7 to QR9
96
QV
97
QH
98
QDE
99
QCLK
100
VDDI
101
VSS
102
EXCLK
103
OVDDE3
104
PH1
105
N.C
106
AVS1
107
AVD1
108
CPO
109
N.C
110
VCI
111
AVS2
112
AVD2
113
N.C
114
PH2
115
PLLEN
116
OVDDE4
117
DCLK
118
OVSS1
119
DCLKP
120
VDDI
I/O
—
Digital ground
—
Digital positive supply voltage (+3.3V) for Pad Ring
O
R data output
O
Vertical sync output
O
Horizontal sync output
O
Data enable output
O
Pixel clock output
—
Digital positive supply voltage (+2.5V) for Pad Ring
—
Digital ground
I
Pixel clock input for external PLL mode.
—
Digital positive supply voltage (+3.3V) for Pad Ring
O
Phase comparate signal-1 for external PLL (not used)
—
Not used
—
Analog ground for PLL
—
Digital positive supply voltage (+3.3V) for PLL
O
Charge pump output for internal PLL
—
Not used
I
VCO input for internal PLL
—
Analog ground for PLL
—
Digital positive supply voltage (+3.3V) for PLL
—
Not used
O
Phase comparate signal-2 for external PLL (not used)
I
PLL mode select signal input (internal mode or external mode)
—
Digital positive supply voltage (+3.3V) for Pad Ring
I
System clock input (27MHz)
—
Digital ground
I
DCLK polarity control signal input
—
Digital positive supply voltage (+2.5V) for Pad Ring
HCD-FX100W
Desciption
89