Yamaha Clavinova CLP-970 Service Manual page 20

CLP-970/CLP-970M/CLP-970C/CLP-970A/CLP-970AM/CLP-970AC
TC160G22AF-1252 (XU135A00) MI2 (MPU Interface 2)
PIN
NAME I/O FUNCTION
NO.
1 TEST I Test pin
2 VDD Power supply
3 XIN I Clock
4 XOUT O Clock
5 VSS Ground
6 /RESET I Reset
7 /MCS I Main CPU chip select
8 /MRD I Main CPU read
9 /MWR I Main CPU write
10 /MIRQ O Main CPU interrupt request
11 MA0 I Main CPU address 0
12 VSS Ground
13 MA1 I
14 MA2 I
Main CPU address 1-4
15 MA3 I
16 MA4 I
17 MD0 I/O
18 MD1 I/O
19 MD2 I/O
21 VSS
22 MD4 I/O
23 MD5 I/O
24 MD6 I/O
25 MD7 I/O
26 MD8 I/O Main CPU data 0-15
27 MD9 I/O
28 MD10 I/O
29 MD11 I/O
30 MD12 I/O
31 MD13 I/O
32 MD14 I/O
33 VDD
34 MD15 I/O
35 /SCS I Slave CPU chip select
36 /SRD I Slave CPU read
37 /SWR I Slave CPU write
38 /SIRQ O Slave CPU interrupt request
39 SA0 I Slave CPU address 0
40 VSS Ground
YMZ702-D (XR632A00) KSN2 (Key Scanner)
PIN
NAME I/O FUNCTION
NO.
1 BK5 O
2 BK4 O
3 BK3 O
Key block (open drein)
4 BK2 O
5 BK1 O
6 BK0 O
7 MK15 I
8 MK14 I
9 MK13 I
First make contact
10 MK12 I
11 MK11 I
12 MK10 I
13 MK05 I
14 MK04 I
15 MK03 I
Second make contact
16 MK02 I
17 MK01 I
18 MK00 I
19 XIN I Crystal osc. input (4 MHz)
20 XOUT O Crystal osc. output (4 MHz)
20
(Ground)
(Power supply)
PIN
NAME I/O FUNCTION
NO.
41 SD0 I/O
42 SD1 I/O
43 SD2 I/O
44 SD3 I/O
45 SD4 I/O
46 SD5 I/O
47 SD6 I/O
48 SD7 I/O
49 SD8 I/O Slave CPU data 0-15
50 SD9 I/O
51 SD10 I/O
52 VSS
53 SD11 I/O
54 SD12 I/O
55 SD13 I/O
56 SD14 I/O
57 SD15 I/O
58 /TXREQ I 4-bit CPU send data request
59 RRDY I 4-bit CPU ready
61 SD I/O 4-bit CPU data
62 DR1 O KBS interface drive (pedal)
63 DR2 O KBS interface drive (lower keyboard)
64 DR3 O KBS interface drive (upper keyboard)
65 KD1 I Keyboard data scan (pedal)
66 KD2 I Keyboard data scan (lower keyboard)
67 KD3 I Keyboard data scan (upper keyboard)
68 KBSCLK O KBS clock
69 XCLK1 I
70 XCLK2 I KSN interface clock
71 XCLK3 I
72 KSEL I KBS/KSN select
73 VDD Power supply
74 ADSEL0 O
75 ADSEL1 O FSV interface CH select
76 ADSEL2 O
77 ADMCLK O FSV A/D system clock (8 MHz)
78 ADL/R O FSV A/D L/R clock(31.25 kHz)
79 ADSCLK O FSV A/D bit clock(1 MHz)
80 ADDATA I FSV A/D data
PIN
NAME I/O FUNCTION
NO.
21 GND Ground
22 VDD Power supply
23 SO O Serial data
24 ACK I Acknowledge/mode select
25 XCK I Clock for serial data
26 /IC I Initial clear
27 TST1 I Test mode
28 TST2 I (L,L: normal mode, others: test)
29 XCKINH I Inhibit of serial clock
30 BK14 O
31 BK13 O
32 BK12 O
33 BK11 O
34 BK10 O Key block (open drein)
35 BK9 O
36 BK8 O
37 BK7 O
38 BK6 O
39 GND Ground
40 VDD Power supply
DM: IC003
(Ground)
AEXL88-L: KSN2