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BIOS SETUP
PCI Express Configuration
Chipset
Main
Advanced
PCI Express Clock Gating
DMI Link ASPM Control
DMI Link Extended Synch Control
Subtractive Decode
PCI Express Root Port1
►
PCI Express Root Port2
►
PCI Express Root Port3
►
PCI Express Root Port4
►
PCI Express Root Port5
►
PCI Port 6 is assigned to LAN
PCI Express Root Port7
►
PCI Express Root Port8
►
Low MMIO Align
Initiate Graphic Adapter
Graphics Turbo IMON Current
VT-d
PCI Express Port
IGD Memory
PAVP Mode
PEG Force Gen1
DMI Clink ASPM Control
The control of Active State Power Management on both NB side and SB
side of the DMI Link.
DMI Link Extended Synch Control
The control of Extended Synch on SB side of the DMI Link.
46
MI956 User's Manual
Aptio Setup Utility
Boot
Security
Save & Exit
Enabled
L0sL1
Disabled
Disabled
→ ←
Select Screen
↑↓ Select Item
64M
Enter: Select
PEG/IGD
+-
Change Field
31
F1: General Help
Disabled
F2: Previous Values
Auto
F3: Optimized Default
32M
F4: Save & Exit
Disabled
ESC: Exit
Disabled