Sony BVS-A3232 Maintenance Manual page 85

Analog audio routing switcher
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MAX202CSE (MAXIM)
MAX202CSE-TE2
RS-232 TRANSMITTER/RECEIVER
— TOP VIEW —
1
C1
V
CC
+
C1
1
16
3
(+5 V)
C1
4
C2
+
V
2
15
GND
5
C2
C1
3
14
T1
OUT
11
T1
10
T2
C2
+
4
13
R1
IN
13
R1
C2
5
12
R1
OUT
8
R2
V
6
11
T1
IN
R1, 2
T2
7
10
T2
OUT
IN
T1, 2
R2
8
9
R2
IN
OUT
0.1 µF
INPUT
+
1
+
+5 V to +10 V
0.1 µF
VOLTAGE DOUBLER
3
+
4
+10 V to –10 V
0.1 µF
VOLTAGE INVERTER
5
+5 V
400 K
11
T1
+5 V
TTL/CMOS
INPUTS
400 K
10
T2
12
TTL/CMOS
OUTPUTS
9
MC14495P1 (MOTOROLA)
C-MOS BCD-TO-SEVEN-SEGMENT 4-BIT LATCH / DECODER DRIVER
-TOP VIEW-
V
DD
e
1
16
OUT
(+4.5 to +16V)
f
2
15
d
OUT
OUT
g
c
OUT
3
14
OUT
h+i
b
4
13
OUT
OUT
A
5
12
a
IN
OUT
B
6
11
VCR
IN
IN
CK
7
10
D
IN
IN
8
9
C
IN
GND
INPUTS
OUTPUTS
CK
D
C
B
A
a
b
c
d
e
f
g
h+i
VCR
0
0
0
0
0
1
1
1
1
1
1
0
0
Z
0
0
0
0
1
0
1
1
0
0
0
0
0
Z
0
0
0
1
0
1
1
0
1
1
0
1
0
Z
0
0
0
1
1
1
1
1
1
0
0
1
0
Z
0
0
1
0
0
0
1
1
0
0
1
1
0
Z
0
0
1
0
1
1
0
1
1
0
1
1
0
Z
0
0
1
1
0
1
0
1
1
1
1
1
0
Z
0
0
1
1
1
1
1
1
0
0
0
0
0
Z
0
1
0
0
0
1
1
1
1
1
1
1
0
Z
0
1
0
0
1
1
1
1
1
0
1
1
0
Z
0
1
0
1
0
1
1
1
0
1
1
1
1
Z
0
1
0
1
1
0
0
1
1
1
1
1
1
Z
0
1
1
0
0
1
0
0
1
1
1
0
1
Z
0
1
1
0
1
0
1
1
1
1
0
1
1
Z
0
1
1
1
0
1
0
0
1
1
1
1
1
Z
0
1
1
1
1
1
0
0
0
1
1
1
1
O
X
X
X
X
X
X
X
X
X
X
X
X
Z/O
1
X
X
X
X
X
X
X
X
X
X
X
X
Z/O
0
; LOW LEVEL
1
; HIGH LEVEL
X
; DON'T CARE
Z
; HIGH IMPEDANCE
BVS-A3232/V3232
2
+
V
+
6
+
V
14
T1
7
T2
12
R1
9
R2
; RECEIVER 1, 2
; TRANSMITTER 1, 2
+5 V
0.1 µF
6.3 V
+
16
2 +10 V
–10 V
6
0.1 µF
16 V
+
14
RS-232
OUTPUTS
7
13
R1
5 K
RS-232
INPUTS
8
R2
5 K
15
5
12
A
a
6
13
B
b
9
14
C
c
10
15
D
d
1
e
2
f
3
g
7
4
h+i
11
VCR
a
f
b
g
e
c
d
DISPLAY
0
1
2
3
4
5
6
7
8
9
A
b
C
d
E
F
DATA LATCH
DATA HOLD
MC14555BF (MOTOROLA)FLAT PACKAGE
MC14555BFEL
C-MOS BINARY TO 1-OF-4 DECODER/DEMULTIPLEXER
–TOP VIEW–
V
DD
EN
1
16
(ENABLE) IN
(+3 to +18V)
A
2
15
EN
(SELECT) IN
(ENABLE) IN
B
3
14
A
(SELECT) IN
(SELECT) IN
Y0
4
13
B
OUT
(SELECT) IN
Y1
5
12
Y0
OUT
OUT
Y2
Y1
OUT
6
11
OUT
Y3
Y2
7
10
OUT
OUT
8
GND
9
Y3
OUT
MC74HC688N (MOTOROLA)
TC74HC688AP
C-MOS 8-BIT EQUALITY DETECTOR
-TOP VIEW-
2
V
DD
G
1
20
4
( +2 to +6V )
6
P0
2
19
P=Q
8
11
Q0
3
18
Q7
13
15
P1
4
17
P7
17
Q1
5
16
Q6
3
5
P2
6
15
P6
7
9
Q2
7
14
Q5
12
14
P3
8
13
P5
16
18
Q3
9
12
Q4
10
GND
11
P4
17
P7
18
Q7
15
P6
16
Q6
13
P5
14
Q5
11
P4
12
Q4
8
P3
9
Q3
6
P2
7
Q2
4
P1
5
Q1
2
P0
3
Q0
1
G
2
4
A
Y0
3
5
B
Y1
6
Y2
7
Y3
EN
1
14
12
A
Y0
13
11
B
Y1
10
Y2
9
Y3
EN
15
INPUTS
OUTPUTS
EN
B
A
Y3
Y2
Y1
Y0
0
0
0
0
0
0
1
0
0
1
0
0
1
0
0
1
0
0
1
0
0
0
1
1
1
0
0
0
1
X
X
0
0
0
0
0
; LOW LEVEL
1
; HIGH LEVEL
X
; DON´T CARE
P0
P1
P2
P3
P4
P5
P6
P7
19
P=Q
Q0
Q1
Q2
Q3
Q4
Q5
Q6
Q7
G
1
INPUTS
OUTPUT
P, Q
G
P=Q
P=Q
0
0
19
P=Q
P>Q
0
1
P<Q
0
1
X
1
1
0
; LOW LEVEL
1
; HIGH LEVEL
X
; DON'T CARE
IC
6-7

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