Sony MDS-JB980 Service Manual page 34

Minidisc digital audio system
Hide thumbs Also See for MDS-JB980:
Table of Contents

Advertisement

MDS-JB980
• IC201 CXD2664R (DIGITAL SERVO SIGNAL PROCESSOR/DIGITAL SIGNAL PROCESSOR) (BD BOARD)
Pin No.
Pin Name
1
MNT0 (FOK)
2
MNT1 (SHCK)
3
MNT2 (XBUSY)
4
MNT3 (SLOC)
5
VDC0
6
SWDT
7
SCLK
8
XLAT
9
VSC0
10
SRDT
11
SENS
12
XRST
13
SQSY
14
DQSY
15
RPWR
16
XINT
17
XT
18
VDIO0
19
OSCI
20
OSCO
21
OSCN
22
VSIO0
23
XTSL
24
DIN0
25
DIN1
26
DOUT
27
DATAI
28
LRCKI
29
XBCKI
30
VDC1
31
VSC1
32
ADDT
33
DADT
34
LRCK
35
XBCK
36
FS256
37
XWE
38
XOE
39
DRVDD0
40
DRVSS0
41
A11
42
D3
43
D0
44
D2
45
D1
* O (3) for 3-state output in the column I/O
34
I/O
Not used. (open)
O
Track jump detection signal output to the system control
O
In the state of executire command signal output
O
Not used. (open)
O
Power supply pin (+2.6 V)
Serial data signal input from the system control
I
Serial clock signal input from the system control
I
Serial latch signal input from the system control
I
Ground pin
Serial reading data signal output to the system control
O (3)
Internal status (SENSE) output to the system control
O (3)
Reset signal input from the system control "L": Reset
I
Subcode Q sync (SCOR) signal output to the system control
O
Digital In U-bit CD format or MD format subcode Q sync (SCOR) signal output to the
O
system control
Laser power switching signal input from the system control "H": Recording, "L": Playback
I
Interrupt status signal output to the system control
O
Recording data signal output enable input from the system control
O
Power supply pin (+3.3 V)
System clock signal input (Fixed at "L".)
I
System clock signal input (Input terminal during OSCN:"H" )
I/O
Internal oscillating circuit control signal input
I
Ground pin
System clock frequency setting (Fixed at "H".)
I
Digital audio signal input (Optical input)
I
Digital audio signal input (USB input)
I
Digital audio signal output (Optical output)
O
Serial data signal input
I
LR clock signal input
I
Serial data bit clock signal input
I
Power supply pin (+2.6 V)
Ground pin
Data input from the A/D converter
I
Data output to the D/A converter
O
LR clock signal output for the A/D and D/A converter
O
Bit clock signal output to the A/D and D/A converter
O
256Fs clock signal output (Not used.)
O
Write enable signal output for DRAM
O
Read enable signal output for DRAM
O
Power supply pin (+3.3 V)
Ground pin
DRAM address output (Not used.) (Open)
O
I/O
I/O
Data input/output for DRAM
I/O
I/O
Description

Advertisement

Table of Contents
loading

Table of Contents