Haier LE49K6500U Service Manual page 31

5
E
BA2,CSB1,CSB2 need GND shielding
U201A
D
AVDD_DDR1_S
RM 01
2K
C 25
H26
A-RST
NC/10nF
G26
A-CKE
RM 02
2K
C
AVDD_DDR1_S
L26
DRAM_VREF
MR 07
1K/1% MR 08 C 20 C 21
1K/1%
0.1uF/16V/X5R
1000pF
MR 09
2 0R/1%
K27
ZQ
M25
ZQ1
MR 10
2 0R/1%
DDR3 : MR410 240R/1%
B
LPDDR3 : MR410 0.1uF
MSD6A538
1.5V_DDR
C ose to DDR POWER PIN
CB 05 CB 06 CB 07 CB 08 CB 09 CB 10 CB 11 CB 12 CB 13 CB 1
10uF/6 3V/X5R 0.1uF/16V/X5R 0.1uF/16V/X5R 0.1uF 16V/X5R 0.1uF/16V/X5R
10uF/6 3V/X5R 0.1uF/16V/X5R 0.1uF/16V/X5R 0.1uF 16V/X5R 0.1uF/16V/X5R
1.5V_DDR
CB 17 CB 18 CB 19 CB 20 CB 21 CB 22 CB 23 CB 00 CB 2 CB 25
A
0.1uF/16V/X5R 0.1uF/16V/X5R 0.1uF/16V/X5R 0.1uF 16V/X5R 0.1uF/16V/X5R
0.1uF/16V/X5R 0.1uF/16V/X5R 0.1uF/16V/X5R 0.1uF 16V/X5R 0.1uF/16V/X5R
1.5V_DDR
CB 28 CB 29 CB 30 CB 31 CB 32 CB 33 CB 3 CB 35 CB 36 CB 37
0.1uF/16V/X5R 0.1uF/16V/X5R 0.1uF/16V/X5R 0.1uF 16V/X5R 0.1uF/16V/X5R
0.1uF/16V/X5R 0.1uF/16V/X5R 0.1uF/16V/X5R 0.1uF 16V/X5R 0.1uF/16V/X5R
5
D-DDR3-ODT-T1
D-CSB1
D-DDR3-BA2-T1
D-DDR3-BA0-T1
D-DDR3-A3-T1
D-DDR3-A5-T1
D_DDR3_A0
E1 D-DDR3-A7-T1
B-A0 D_DDR3_A
B11 D-DDR3-RESET-T1
B-A1 D_DDR3_A2
D15 D-DDR3-A9-T1
B-A2
D_DDR3_A3
D13 D-DDR3-A13-T1
B-A3
D_DDR3_A
B12
B-A
D_DDR3_A5
E12 D-DDR3-A2-T1
B-A5
D_DDR3_A6
A12 D-DDR3-A0-T1
B-A6
D_DDR3_A7
F1 D-DDR3-WEZ-T1
B-A7
D_DDR3_A8
E16 D-DDR3-CASZ-T1
B-A8
D_DDR3_A9
C9
B-A9
D_DDR3_A10
B13 D-DDR3-RASZ-T1
B-A10
D_DDR3_A11
D17 D-DDR3-A15-T1
B-A11
F18 D_DDR3_A 2
D-DDR3-A1-T1
B-A12
A9 D_DDR3_A13
D-DDR3-A1 -T1
B-A13
A11 D_DDR3_A1
B-A1
F17 D_DDR3_A15
D-DDR3-A11-T1
B-A15
F13 D_DDR3_BA0
D-DDR3-A8-T1
B-BA0
F19 D_DDR3_BA1
D-DDR3-A6-T1
B-BA1
F12 D_DDR3_BA2
D-DDR3-A -T1
B-BA2
F16 D_DDR3_RASZ
B-RASZ
B10 D_DDR3_CASZ
D-DDR3-A12-T1
B-CASZ
C10 D_DDR3_WEZ
D-DDR3-BA1-T1
B-WEZ
F11 D_DDR3_ODT D-DDR3-A10-T1
B-ODT
C1 D_DDR3_CKE D-DDR3-CKE-T1
B-CKE
F15 D_DDR3_RESET
B-RST
C15 D_DDR3_MCLK
B-MCLK
A1 D_DDR3_MCLKZ
B-MCLKZ
B8 D_DDR3_CSB1
B-CSB1
D11 D_DDR3_CSB2
B-CSB2
D_DDR3_DQ2
D23 D_DDR3_DQ0
MIU1
B-DQ[0]
D19 D_DDR3_DQ1 D_DDR3_DQ0
B-DQ[1]
E22 D_DDR3_DQ2
B-DQ[2]
E18 D_DDR3_DQ3
B-DQ[3]
B21 D_DDR3_DQ D_DDR3_DQ13
B-DQ[ ]
B15 D_DDR3_DQ5
B-DQ[5] D_DDR3_DQ6 D_DDR3_DQ15
A21
B-DQ[6] D_DDR3_DQ7
C16
B-DQ[7] D_DDR3_DM0
C17
B-DQM[0] D_DDR3_DQS0 D_DDR3_DQ9
B19
B-DQS[0]
C19 D_DDR3_DQS0B
B-DQSB[0] D_DDR3_DQ12
D_DDR3_DQ8
B17
B-DQ[8]/DQU0 D_DDR3_DQ9
E20
B-DQ[9]/DQU1 D_DDR3_DQ10 D_DDR3_DQ1
F20
B-DQ[10]/DQU2 D_DDR3_DQ
B20
B-DQ[11]/DQU3
D_DDR3_DQ12 D_DDR3_DQ10
D21
B-DQ[12]/DQU
D_DDR3_DQ13
F23
B-DQ[13]/DQU5
D_DDR3_DQ1
F21
B-DQ[1 ]/DQU6
D_DDR3_DQ15 D_DDR3_DQ3
F22
B-DQ[15]/DQU7
D_DDR3_DM1
A20
B-DQM[1]
D_DDR3_DQS1 D_DDR3_DQ1
A18
B-DQS[1]
D_DDR3_DQS B
C18
B-DQSB[1]
D_DDR3_DQ
B28 D_DDR3_DQ16 D_DDR3_DQ6
B-DQ[16]/DQL0
F2 D_DDR3_DQ17
B-DQ[17]/DQL1
C28 D_DDR3_DQ18
B-DQ[18]/DQL2
F25 D_DDR3_DQ19 D_DDR3_DM1
B-DQ[19]/DQL3
F28 D_DDR3_DQ20
B-DQ[20]/DQL
B22 D_DDR3_DQ21 D_DDR3_DQ11
B-DQ[21]/DQL5
E28 D_DDR3_DQ22
B-DQ[22]/DQL6
C23 D_DDR3_DQ23
B-DQ[23]/DQL7
A23 D_DDR3_DM2
B-DQM[2]
B26 D_DDR3_DQS2 D_DDR3_DQ8
B-DQS[2]
C26 D_DDR3_DQS2B
B-DQSB[2]
D_DDR3_DM0
C2 D_DDR3_DQ2
B-DQ[2 ]/DQU0
F27 D_DDR3_DQ25 D_DDR3_DQ7
B-DQ[25]/DQU1
D25 D_DDR3_DQ26
B-DQ[26]/DQU2
C27 D_DDR3_DQ27 D_DDR3_DQ5
B-DQ[27]/DQU3
F26 D_DDR3_DQ28
B-DQ[28]/DQU
E26 D_DDR3_DQ29
B-DQ[29]/DQU5
E2 D_DDR3_DQ30 D_DDR3_DQS1
B-DQ[30]/DQU6
D27 D_DDR3_DQ31 D_DDR3_DQS1B
B-DQ[31]/DQU7
A27 D_DDR3_DM3
B-DQM[3]
C25 D_DDR3_DQS3
B-DQS[3]
B2 D_DDR3_DQS3B
B-DQSB[3]
D_DDR3_DQS0
D_DDR3_DQS0B
D_DDR3_MCLK
D_DDR3_MCLKZ
AVDD_DDR1_S
AVDD_DDR1_S AVDD_DDR1_S
D-MVREFDQ-T1
CB 15 CB 16 CB500
MR 11 MR 13 MR 12
1K/1% C 22 C 23 1K/1% MR 1 C 2
10uF 6.3V X5R 1000pF 1K/1%
0.1uF/16V X5R 1K/1% 0.1uF/16V X5R
0.1uF/16V X5R
AVDD_DDR1_S AVDD_DDR1_S
CB 26 CB 27
D-MVREFCA-T1 D-MVREFCA-T2
MR 17 MR 19 MR 18
1K/1% C 00 C 02 1K/1% MR 00 C 03
0.1uF/16V X5R
0.1uF/16V X5R 1K/1% 1000pF 1K/1%
0.1uF/16V X5R
CB 38 CB 39
0.1uF/16V X5R
0.1uF/16V X5R
3
33RX RP 0 33RX RP 05
D_DDR3_ODT D_DDR3_ODT D-DDR3-ODT-T2
D_DDR3_CSB1 D_DDR3_CSB2
D-CSB2
82RX RP 06 82RX RP 00
D_DDR3_BA2 D_DDR3_BA2
D-DDR3-BA2-T2
D_DDR3_BA0 D_DDR3_BA0
D-DDR3-BA0-T2
D_DDR3_A3 D_DDR3_A3
D-DDR3-A3-T2
D_DDR3_A5 D_DDR3_A5
D-DDR3-A5-T2
82RX RP 07 82RX RP 09
D_DDR3_A7 D_DDR3_A7
D-DDR3-A7-T2
D_DDR3_RESE D_DDR3_RESE
D-DDR3-RESET-T2
D_DDR3_A9 D_DDR3_A9
D-DDR3-A9-T2
D_DDR3_A13 D_DDR3_A13
D-DDR3-A13-T2
82RX RP 10 82RX RP 08
D_DDR3_A2 D_DDR3_A2
D-DDR3-A2-T2
D_DDR3_A0 D_DDR3_A0
D-DDR3-A0-T2
D_DDR3_WEZ D_DDR3_WEZ
D-DDR3-WEZ-T2
D_DDR3_CASZ D_DDR3_CASZ
D-DDR3-CASZ-T2
82RX RP 1 82RX RP 12
D_DDR3_RASZ D_DDR3_RASZ
D-DDR3-RASZ-T2
D_DDR3_A15 D_DDR3_A15
D-DDR3-A15-T2
D_DDR3_A D_DDR3_A
D-DDR3-A1-T2
D_DDR3_A1 D_DDR3_A1
D-DDR3-A1 -T2
82RX RP 13 82RX RP 1
D_DDR3_A11 D_DDR3_A11
D-DDR3-A11-T2
D_DDR3_A8 D_DDR3_A8
D-DDR3-A8-T2
D_DDR3_A6 D_DDR3_A6
D-DDR3-A6-T2
D_DDR3_A D_DDR3_A
D-DDR3-A -T2
82RX RP 15 82RX RP 16
D_DDR3_A12 D_DDR3_A12
D-DDR3-A12-T2
D_DDR3_BA1 D_DDR3_BA1
D-DDR3-BA1-T2
D_DDR3_A10 D_DDR3_A10 D-DDR3-A10-T2
D_DDR3_CKE D_DDR3_CKE D-DDR3-CKE-T2
D-DDR3-DQ2 D_DDR3_DQ25 D-DDR3-DQ25
D-DDR3-DQ0 D_DDR3_DQ28 D-DDR3-DQ28
D-DDR3-DQ13
D_DDR3_DQ30 D-DDR3-DQ30
D-DDR3-DQ15
D_DDR3_DQ26
D-DDR3-DQ26
D_DDR3_DM2
D-DDR3-DQ9 D-DDR3-DM2
D_DDR3_DQ2
D-DDR3-DQ12 D-DDR3-DQ2
D_DDR3_DQ19
D-DDR3-DQ1 D-DDR3-DQ19
D_DDR3_DQ17
D-DDR3-DQ10 D-DDR3-DQ17
D_DDR3_DQ20
D-DDR3-DQ20
D-DDR3-DQ3
D_DDR3_DQ22
D-DDR3-DQ22
D-DDR3-DQ1
D_DDR3_DQ18
D-DDR3-DQ D-DDR3-DQ18
D_DDR3_DQ16
D-DDR3-DQ6 D-DDR3-DQ16
D_DDR3_DM3
D-DDR3-DM1 D-DDR3-DM3
D_DDR3_DQ27
D-DDR3-DQ11 D-DDR3-DQ27
D_DDR3_DQ31
D-DDR3-DQ8 D-DDR3-DQ31
D_DDR3_DQ29
D-DDR3-DM0 D-DDR3-DQ29
D_DDR3_DQ23
D-DDR3-DQ7 D-DDR3-DQ23
D-DDR3-DQ5 D_DDR3_DQ21 D-DDR3-DQ21
D-DDR3-DQS1 D_DDR3_DQS3B D-DDR3-DQS3B
D-DDR3-DQS1B D_DDR3_DQS3 D-DDR3-DQS3
D-DDR3-DQS0 D_DDR3_DQS2B D-DDR3-DQS2B
D-DDR3-DQS0B D_DDR3_DQS2 D-DDR3-DQS2
D_DDR3-MCLK D-DDR3_MCLK
D_DDR3-MCLKZ D-DDR3_MCLKZ
D-MVREFDQ-T2
AVDD_DDR1_S AVDD_DDR1_S
C 01
1000pF
0.1uF/16V/X5R RM 03
2K
D-DDR3-RESET-T1 D-DDR3-RESET-T2
D-DDR3-CKE-T1 D-DDR3-CKE-T2
CB 03
C 0 RM 00 RM 05
2K 0 01uF/50V/X7R 2K
1000pF
0.1uF/16V/X5R
3
2
AVDD_DDR1_S
MU 01
NT5CB256M16DP-EK
D-DDR3-A0-T1 N3
A0
D-DDR3-A1-T1 P7
A1
D-DDR3-A2-T1 P3
A2
D-DDR3-A3-T1 N2
A3
D-DDR3-A -T1 P8
A
D-DDR3-A5-T1 P2
A5
D-DDR3-A6-T1 R8
A6
D-DDR3-A7-T1 R2
A7
D-DDR3-A8-T1 T8
A8
D-DDR3-A9-T1 R3
A9
D-DDR3-A10-T1 L7
A10
D-DDR3-A11-T1 R7
A11
D-DDR3-A12-T1 N7
A12
D-DDR3-BA0-T1 M2
BA0
D-DDR3-BA1-T1 N8
BA1
D-DDR3-BA2-T1 M3
BA2
L2
D CSB1
/CS
J3
D-DDR3-RASZ-T1
/RAS
K3
D-DDR3-CASZ-T1
/CAS
L3
D-DDR3-WEZ-T1
/WE
D-DDR3-ODT-T1 K1
ODT
M8
D-MVREFCA-T1
VREFCA
J1
NC1
J9
NC2
L1
NC3
L9
NC
M7
D DDR3-A15-T1
NC5
T3
D-DDR3-A13-T1
A13
T7
D-DDR3-A1 -T1
NC7
DDR3 4G bit 1866MHz
MR 05
2 0R/1%
AVDD_DDR1_S
MU 00
NT5CB256M16DP-EK
D DDR3-A0-T2 N3
A0
D DDR3-A1-T2 P7
A1
D DDR3-A2-T2 P3
A2
D DDR3-A3-T2 N2
A3
D DDR3-A -T2 P8
A
P2
D DDR3-A5-T2
A5
R8
D DDR3-A6-T2
A6
R2
D DDR3-A7-T2
A7
T8
D DDR3-A8-T2
A8
R3
D DDR3-A9-T2
A9
L7
D DDR3-A10-T2
A10
R7
D DDR3-A11-T2
A11
N7
D DDR3-A12-T2
A12
M2
D DDR3-BA0-T2
BA0
N8
D DDR3-BA1-T2
BA1
M3
D DDR3-BA2-T2
BA2
L2
D-CSB2
/CS
J3
D DDR3-RASZ-T2
/RAS
D DDR3-CASZ-T2 K3
/CAS
D DDR3-WEZ-T2 L3
/WE
D DDR3-ODT-T2 K1
ODT
D MVREFCA-T2 M8
VREFCA
J1
NC1
J9
NC2
L1
NC3
L9
NC
D-DDR3-A15-T2 M7
NC5
D DDR3-A13-T2 T3
A13
D DDR3-A1 -T2 T7
NC7
MR 06
2 0R 1%
CSB terminator
1.5V_DDR
D-CSB1 MR 15 70R
RM 0
2K
D-CSB2 MR 16 70R
C 05
0.1uF/16V/X5R
CB 0
0.01uF/50V/X7R
tle tle tle
Size Size Size
Cust m Cust m Cust m
Date: Date: Date:
2
1
E
D3 D-DDR3-DM1
DMU
C7 D-DDR3-DQS1
DQSU
B7 D-DDR3-DQS1B
/DQSU
D7 D-DDR3-DQ8
DQU0
C3 D-DDR3-DQ9
DQU1
C8 D-DDR3-DQ10
DQU2
C2 D-DDR3-DQ11
DQU3
A7 D-DDR3-DQ12
DQU
A2 D-DDR3-DQ13
DQU5
B8 D-DDR3-DQ1
DQU6
A3 D-DDR3-DQ15
DQU7
E7 D-DDR3-DM0
DML
F3 D-DDR3-DQS0
DQSL
G3 D-DDR3-DQS0B
/DQSL
E3
D-DDR3-DQ0
DQL0
F7
D-DDR3-DQ1
DQL1
F2
D-DDR3-DQ2
DQL2
F8
D-DDR3-DQ3
DQL3
H3 D-DDR3-DQ
DQL
H8
D-DDR3-DQ5
DQL5
G2
D-DDR3-DQ6
DQL6
H7
D-DDR3-DQ7
DQL7
H1
D-MVREFDQ-T1
VREFDQ
J7 D_DDR3-MCLK
CK
K7 D_DDR3-MCLKZ
/CK
K9 D
D-DDR3-CKE-T1
CKE
T2
D-DDR3-RESET-T1
/RESET
D3 D-DDR3-DM3
DMU
C7 D-DDR3-DQS3
DQSU
B7 D-DDR3-DQS3B C
DQSU
D7 D-DDR3-DQ2
DQU0
C3
D-DDR3-DQ25
DQU1
C8
D-DDR3-DQ26
DQU2
C2
D-DDR3-DQ27
DQU3
A7
D-DDR3-DQ28
DQU
A2
D-DDR3-DQ29
DQU5
B8
D-DDR3-DQ30
DQU6
A3
D-DDR3-DQ31
DQU7
E7
D-DDR3-DM2
DML
F3
D-DDR3-DQS2
DQSL
G3
D-DDR3-DQS2B
/DQSL
E3
D-DDR3-DQ16
DQL0
F7
D-DDR3-DQ17
DQL1
F2 D-DDR3-DQ18
DQL2
F8 D-DDR3-DQ19
DQL3
H3 D-DDR3-DQ20
DQL
H8 D-DDR3-DQ21
DQL5
G2 D-DDR3-DQ22
DQL6
H7 D-DDR3-DQ23
DQL7
H1 D-MVREFDQ-T2
VREFDQ
J7 D-DDR3_MCLK
CK
K7 D DDR3_MCLKZ
/CK
K9 D-DDR3-CKE-T2
CKE
T2 D-DDR3-RESET-T2
/RESET
B
A
05. DRAM 05. DRAM 05. DRAM
Document Number Document Number Document Number Rev Rev Rev
<Doc> <Doc> <Doc> RevCode> RevCode> RevCode>
Thursday, March 30, 2017 Thursday, March 30, 2017 Thursday, March 30, 2017 Sheet Sheet Sheet 5 5 5 of of of 13 13 13
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