TYAN S8032 Manual page 53

Riser-L Down Slot Link Width Configuration
Setting Pcie Slot Link Width
x4x4 / x8
Riser-R Middle Slot Link Width Configuration
Right Riser Middle Slot Link Width Configuration, Auto is detected by
GPIO(x8x8/x16)
x4x4x4x4 / x8x8 / x16 / Auto
Riser-R Down Slot Link Width Configuration
Setting Pcie Slot Link width
x4x4 / x8
NVMe OPROM Policy
Select the NVMe SSD OPROM Policy
Embedded OPROM / External OPROM / Auto
OCP Slot Link Speed
OnBoard PCIE Slot Link Speed Configuration.
Auto / Gen 1(2.5 GT/s) / Gen 2 (5 GT/s) / Gen 3 (8 GT/s) / Gen 4 (16 GT/s)
Riser-L Up Slot Link Speed
Onboard PCIE Slot Link Speed Configuration
Auto / Gen 1(2.5 GT/s) / Gen 2 (5 GT/s) / Gen 3 (8 GT/s) / Gen 4 (16 GT/s)
Riser-L Middle Slot Link Speed
Onboard PCIE Slot Link Speed Configuration
Auto / Gen 1(2.5 GT/s) / Gen 2 (5 GT/s) / Gen 3 (8 GT/s) / Gen 4 (16 GT/s)
Riser-L Down Slot Link Speed
Onboard PCIE Slot Link Speed Configuration
Auto / Gen 1(2.5 GT/s) / Gen 2 (5 GT/s) / Gen 3 (8 GT/s) / Gen 4 (16 GT/s)
Riser-R Up Slot Link Speed
Onboard PCIE Slot Link Speed Configuration
Auto / Gen 1(2.5 GT/s) / Gen 2 (5 GT/s) / Gen 3 (8 GT/s) / Gen 4 (16 GT/s)
Riser-R Middle Slot Link Speed
Onboard PCIE Slot Link Speed Configuration
Auto / Gen 1(2.5 GT/s) / Gen 2 (5 GT/s) / Gen 3 (8 GT/s) / Gen 4 (16 GT/s)
Riser-R Down Slot Link Speed
Onboard PCIE Slot Link Speed Configuration
Auto / Gen 1(2.5 GT/s) / Gen 2 (5 GT/s) / Gen 3 (8 GT/s) / Gen 4 (16 GT/s)
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