Sony HCD-SHAKE7 Service Manual page 59

IC656 TAS3108DCPR (MOTHERBOARD BOARD (1/10))
1
AVSS
2
VR_PLL
XTALI 3
XTALO 4
MCLKI 5
MCRCK_DV 6
CS0 7
GPIO 8
Input
DVDD 9
SAP
DVSS 10
SDIN1 11
SDIN2 12
SDIN3 13
SDIN4 14
SDA1 15
SCL1 16
17
SDA2
SCL2 18
IC661 SN74LV4052APWR (MOTHERBOARD BOARD (1/10))
1 16
2Y0
15
2Y2 2
14
2-COM 3
13
2Y3 4
12
5
2Y1
INH 6 11
GND 7 10
GND 8
÷2 ÷2
OSC
MCLK
÷2
÷ Z = 2
DEFAULT
M
U
X
÷ X = 1
DEFAULT
÷ Y = 64
DEFAULT
PLL and Clock Management
2
I C
Master/Slave
Controller
VCC
1Y2
1Y1
1-COM
1Y0
1Y3
A
9 B
39 38 37 36 35 34
M
U
X
M
U
PLL
M
X
U
X 11
X
÷2
M
U
X
M
U
X
Audio DSP Core
Microprocessor
and
2
I C Bus Controller
N = 0 (Default)
Oversample Clock
N
1/2
Master
SCL
÷10 1/(M+1)
M = 8 (Default)
HCD-SHAKE7
33 32 31 30 29 28 27 26 25 24 23 22
÷4
M
U
X
Output
SAP
8-Bit
WARP
8051 Microprocessor
21 20 19
59