Gigabyte Z690 AORUS TACHYON User Manual page 21

OC Buttons
GIGABYTE's unique OC buttons help enthusiasts and overclockers not only get the most performance from
their hardware, but also the absolute most enjoyable OC experience with features like overclocking the CPU in
real-time, automatically loading the most optimized overclocking configuration for the processor and memory,
and loading users' customized settings, etc.
Cold Reset Button (RTY_SW):
Use this button to force your system to reboot. This is usually used if a CPU crash or memory errors occur or warm reset
doesn't work when tuning your system settings. Hitting this button to force the system to shutdown and boot again.
CPU Ratio Down Button (RATIO_DW):
Manually lower the CPU ratio. Press once to lower the CPU ratio by one. Or you can remap this button to lower BCLK
through the BIOS so you can press once to lower one BCLK stepping (0.1MHz/0.33MHz)
CPU Ratio Up Button (RATIO_UP):
Manually raise the CPU ratio. Press once to raise the CPU ratio by one. Or you can remap this button to raise BCLK in
the BIOS so you can press once to raise one BCLK stepping (0.1MHz/0.33MHz)
OC Trigger Switch (TGR):
This switch can be used to lower the CPU frequency to cool down the CPU temperature before running a benchmark without
having to change any software settings. Instantly setting the TGR switch back to its default position when the benchmark
begins will revert the CPU frequency to the original value
Reserved Switch (RSV_SW)
This switch is reserved for hardware expansion. A single phase power design is reserved for future use.
1 2 3
1 2 3
LIMP_MODE
2
1: Target frequency set in BIOS Setup or other overclocking application.
1
2
2: Safe frequency (using the lowest CPU ratio, which may vary by CPU)
1
RTY_SW
RATIO_UP
RATIO_DW
TGR
RSV_SW
Protection Mode Button (LIMP_MODE):
This button allows the system to automatically reboot with default or safe settings
without having to clear CMOS settings first. This is useful in situations when
users fail to boot up the system with their self-defined memory parameters.
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