Pch Softstraps; Flumap1-Flash Upper Map 1; (Flash Descriptor Records)32; Intel Me Vendor Specific Component Capabilities Table - Intel PCH-LP Programming Manual

4.1.5

PCH Softstraps

See Appendix A for Record descriptions and listings.
4.1.6 Descriptor Upper Map Section
4.1.6.1 FLUMAP1—Flash Upper Map 1
(Flash Descriptor Records)
Memory Address:FDBAR + EFCh
Bits
31:16
15:8
7:0
®
4.1.7 Intel
Entries in this table allow support for a SPI flash part for Intel Management Engine
capabilities including Intel
Since Flash Partition Boundary Address (FPBA) has been removed, UVSCC and LVSCC
has been replaced with VSCC0 and VSCC1 in Broadwell PCH-LP. VSCC0 is for SPI
component 0 and VSCC1 is for SPI component 1.
If SFDP tables are not found by the SPI controller, then the VSCCn must be written
before Intel ME can issue a Write or Erase command using the Intel ME Hardware
Sequencing interface. BIOS will still need to set up the proper VSCC registers for BIOS
and Integrated Gigabit Ethernet usage if there is no SFDP table found.
Each VSCC table entry is composed of two 32 bit fields: JEDEC IDn and the
corresponding VSCCn value.
See 4.4 Intel
information on how to program individual entries.
4.1.7.1 JID0—JEDEC-ID 0 Register
(Flash Descriptor Records)
Memory Address: VTBA + 000h
Bits
31:24 Reserved
SPI Component Device ID 1. This field identifies the second byte of the Device ID of the SPI Flash
23:16
Component. This is the third byte returned by the Read JEDEC-ID command (opcode 9Fh).
SPI Component Device ID 0. This field identifies the first byte of the Device ID of the SPI Flash
15:8
Component. This is the second byte returned by the Read JEDEC-ID command (opcode 9Fh).
SPI Component Vendor ID. This field identifies the one byte Vendor ID of the SPI Flash
7:0
Component. This is the first byte returned by the Read JEDEC-ID command (opcode 9Fh).
4.1.7.2 VSCC0—Vendor Specific Component Capabilities 0
(Flash Descriptor Records)
Memory Address: VTBA + 004h
32
Default
0
Reserved
®
Intel ME VSCC Table Length (VTL). Identifies the 1s based number of
1
DWORDS contained in the VSCC Table. Each SPI component entry in the table is 2
DWORDS long.
®
Intel ME VSCC Table Base Address (VTBA). This identifies address bits [11:4]
1
for the VSCC Table portion of the Flash Descriptor. Bits [26:12] and bits [3:0] are 0.
ME Vendor Specific Component Capabilities Table
®
Active Management Technology.
®
ME Vendor-Specific Component Capabilities (Intel
Intel Confidential
Size: 32 bits
Description
®
Size: 32 bits
Description
Size: 32 bits
Descriptor Overview
ME VSCC) Table for
523462