Mitsubishi MELSEC-A A2USHCPU-S1 User Manual page 199

APPENDIX
(3)
(g) Refresh instructions
Link refresh
Link refresh enable/disable
Partial refresh
Application instructions
(a) Logical operation instructions
Logical product
Logical sum
Exclusive logical sum
Not exclusive logical sum
Complements of 2
(sign highlights)
(b) Rotation instructions
Right rotation
Left rotation
(c) Shift instructions
Right shift
Left shift
16 bit
32 bit
16 bit
32 bit
16 bit
32 bit
16 bit
32 bit
16 bit
16 bit
32 bit
16 bit
32 bit
16 bit
Device unit
16 bit
Device unit
App - 4
COM
EI, DI
SEG
Two types each for WAND,
WANDP
DAND, DANDP
Two types each for WOR, WORP
DOR, DORP
Two types each for WXOR,
WXORP
DXOR, DXORP
Two types each for WXNR,
WXNRP
DXNR, DXNRP
NEG, NEGP
ROR, RORP, RCR, RCRP
DROR, DRORP, DRCR, DRCRP
ROL, ROLP, RCL, RCLP
DROL, DROLP, DRCL, DRCLP
SFR, SFRP, BSFR, BSFRP
DSFR, DSFRP
SFL, SFLP, BSFL, BSFLP
DSFL, DSFLP