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POST Code
0x39
Set Enhanced addressing mode for each channel
0x40
Perform steps required after JEDEC init
0x41
Program the receive enable reference timing control register
0x42
Post receive enable initialization
0x43
Enable sense amps. Reset read/write DQS pointers
0x44
Perform ME steps
0x45
Clear DRAM initialization bit in the ICH.
0x46
Program Thermal Management
0x47
Program TS on DIMM
0x48
Program TS on Board
0xAF
Exit MRC
0xE0
#define MEM_ERR_BAD_DIMM (S11)
0xE1
#define MEM_ERR_ECC_DIMM (S06)
0xE2
#define MEM_ERR_SIDES (S07)
0xE3
#define MEM_ERR_WIDTH (S08, S10)
0xE4
#define MEM_ERR_TRFC (FindTrasTrpTrcd)
0xE5
#define MEM_ERR_CAS_LATENCY (S12, S13)
0xE6
#define MEM_ERR_REFRESH (ProgDrt)
0xE7
#define MEM_ERR_BL8 (S14)
0xE9
#define MEM_ERR_FREQUENCY (findTCLTacTClk, S13,
S12, ProgramGraphicsFrequency, ProgMchOdt,
GetPlatformData)
0xEA
#define MEM_ERR_SIZE (S14)
0xEC
#define MEM_ERR_TRAS (FindTrasTrpTrcd)
0xED
#define MEM_ERR_TRP (FindTrasTrpTrcd)
0xEE
#define MEM_ERR_TRCD (FindTrasTrpTrcd)
0xEF
#define MEM_ERR_TWR (FindTrasTrpTrcd)
0xF0
#define MEM_ERR_RCVEN_FINDLOW
(CalibrateRcvenForGroup)
0xF1
#define MEM_ERR_RCVEN_FINDEDGE
(CalibrateRcvenForGroup)
0xF2
#define MEM_ERR_RCVEN_FINDPREAMBLE
(CalibrateRcvenForGroup)
0xF6
#define MEM_ERR_RCVEN_PREAMBLEEDGE
(CalibrateRcvenForGroup)
0xF3
#define MEM_ERR_RCVEN_FINDCENTER
(CalibrateRcvenForGroup)
0xF4
#define MEM_ERR_TYPE (S11, S04)
0xF5
#define MEM_ERR_RAWCARD (S11)
0xFA
#define MEM_ERR_SFF (ProgWrioDll)
0xFB
#define MEM_ERR_THERMAL (ProgramThrottling)
0xA0xx
Launch BIOS ACMSclean
0xA4xx
Launch BIOS ACMScheck
0xE5
Wait for ME ready
0xE6
ME Ready
136
Function
Phase
Component
PEI
chipset/MRC
PEI
chipset/MRC
PEI
chipset/MRC
PEI
chipset/MRC
PEI
chipset/MRC
PEI
chipset/MRC
PEI
chipset/MRC
PEI
chipset/MRC
PEI
chipset/MRC
PEI
chipset/MRC
PEI
chipset/MRC
PEI
chipset/MRC
PEI
chipset/MRC
PEI
chipset/MRC
PEI
chipset/MRC
PEI
chipset/MRC
PEI
chipset/MRC
PEI
chipset/MRC
PEI
chipset/MRC
PEI
chipset/MRC
PEI
chipset/MRC
PEI
chipset/MRC
PEI
chipset/MRC
PEI
chipset/MRC
PEI
chipset/MRC
PEI
chipset/MRC
PEI
chipset/MRC
PEI
chipset/MRC
PEI
chipset/MRC
PEI
chipset/MRC
PEI
chipset/MRC
PEI
chipset/MRC
PEI
chipset/MRC
PEI
chipset/MRC
PEI
chipset/MRC
PEI
chipset/MRC
DXE
HECI/iAMT
DXE
HECI/iAMT
Chapter 4
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