Power Block Diagram - Sony HDR-CX250 Service Manual

4-3. POWER BLOCK DIAGRAM (1/2)

VC-652 BOARD (1/2)
J901
DC JACK
CN1001
DC IN
ACV_UNREG_CN
2
BATT/XEXT_CN
3
ACV_GND
1
BATTERY
TERMINAL
BATT_UNREG_CN
+
4
BATT_SIG
5
S
BATT_GND
6 D4101
–
Q4101, Q4102
BATTERY CHARGE
SWITCH
BATT/XEXT_CN
BATT_SIG
MAIN_UNREG
IC9101
USB POWER
MANAGEMENT
(14/14)
BUILT-IN
USB CABLE
OUT1
OUT2
CHARGE
Q9102
CN9101
F007
USB_VCC_STD
USB VBUS
A5 VB1
1
REG33
SWITCH
A6
VB2
B6
NVP
F500
VCC
IC9104
USB
SWITCH
CN9102
(14/14)
USB_VCC
1D+
1 1 2D+
(USB)
VCC
D+
IC9105
CURRENT LIMITER
(14/14)
EN
6 OUT
FAULT
IN
IC9103
USB SWITCH
(13/13)
HDR-CX250/CX250E/CX260E/CX260V/CX260VE/CX270E/CX270V_L3
( ) : Number in parenthesis ( ) indicates the division number of schematic diagram where the component is located.
Q4103
ACV/BATT SELECT SWITCH
F003
CORE_UNREG
F004
I/O_UNREG
F005
MT_UNREG
F001
ACV_UNREG
F002
IC4801
HI CONTROL,
LANC INTERFACE
(10/14)
INIT_CHARGE_ON
F10 O_INIT_CHARGE
Q4801
DC JACK
PUI_BATT_XEXT
C7
DETECT
BATT_SIG
A4 XPUIO_BATT_SIG
BATT_UNREG_SENSE
XO_CS_DDCON
D9103
A1
A2
D9101
UNREG_IN_DET
C4
O_LDO1.2_ON
D_2.8V O_LDO1.8_ON
B2
EVER_3.0V
B1
IC9102
SMART POWER
SELECTOR
(14/14)
VOUT E4
A1 VBUS1
BATT D4
A2 VBUS2
D9102
A3 ISNS
SW2
D5
A5 VBUSLIMIT
L9101
3 SW1 B5 O_SYS_DD_ON
SYS_DD_ON_IC_4302
J_5.0V
10
USB_VBUS
8
Q9107
XVBUS_DET_STD_A
XO_CS_IC_4302
XO_LANC_IC_ON
VBUS_EN
3
XPUI_LANC_PWR_ON
VBUS_XOVR_CUR
4
I_BATT_IN
J_5.0V
1
Q9103
VBUS_DET
LX1a
E1 PVDD1a D1
LX1b
E2 PVDD1b D2
FB1
D3
C8 PVDD2 LX2 B8
LDO1_SOURCE A6
FB2
ACV_ON C5
BATT_ON
A1 LX3a A2
PVDD3a
B1 LX3b B2
PVDD3b
C4
FB3
LD02_SOURCE B4
H6 PVDD4 LX4 H7
FB4 E4
H5 PVDD5a
LX5a H4
G5 PVDD5b
LX5b G4
PVDD_CP
H2 FB5 E3
AVDD
B7
MAIN_UNREG_SENSE
IC4301
DC/DC CONVERTER
(9/14)
LX6a E8
D8
PVDD6a
LX6b E7
D7
PVDD6b
XCS_DD FB6 D5
G1 G6 CS
FR_EVER_
FR_EVER_SI/SO/SCK
SI/SO/SCK
DD_ON
F5 DD_ON
LDO1_ON HB_1.2V
D3 D6 LDO1_ENB LDO1_OUT A5
LDO2_ON HB_1.8V
C4 E5 LDO2_ENB LDO2_OUT A4
IC4302
DC/DC CONVERTER,
LANC DRIVER
(9/14)
E6 VTR_UNREG D_1.2V
PVDD_LDO1 B1
A4
PVDD_LP02
A_1.125V
FR_EVER_SO/SCK
LDO1_OUT A1
A_1.125V_SENSE
DD_ON
DD_ON LDO1_FB B2
F2 C1 LDO1_ON
HDMI_5V
SYS_DD_ON_IC_4302
F1 D2 DD_ON LDO2_OUT A3
LDO2_ON A5
Q4305
ACV
A4 LOAD_IN B6
PVDD_LP02
DETECT
MSX_3.3V
LOAD_OUT
A6
ACV_ON MS_PWR_ON
LOAD_ON
E2 ACV_ON B5
BATT_ON
BATT_ON
D1 LANC_DC
LANC_DC D6
XCS_IC_4302
K9 E3 BATT_LI_3V
CS
VCH
F4
EVER_3.0V
XLANC_ON
EVER3
H2 C2 XLANC_ON F6
XLANC_PWR_ON
C1 C4
XLANC_PWR_ON
BATT_IN
A7 E4 UNREG_IN
VOUT
F5
VuC
UNREG_IN_DET
F2 UNREG_IN_DET
Q4304
BATT_UNREG_SENSE
BATT
E1 BATT_UNREG
DETECT
4-3
L4301
CH1_OUT
L4302
CH2_OUT
L4303
CH3_OUT
L4304
CH4_OUT
L4305
CH5_OUT
IC4304
B+ SWITCH
(9/14)
D_3.3V
1 VIN
SD_PWR_ON VOUT 5
3 EN
L4306
CH6_OUT
IC4303
DC/DC CONVERTER
(9/14)
F006
MT_5.0V
6 VIN BL_H
VOUT 5
L4307
BL_L
FB
1 LX 3
LCD_CABC_PWM
4 EN
HB_1.2V
HB_1.8V
SD_PWR_ON HB_1.2V
AF10 FRC_RTG_IN1
LCD_CABC_PWM HB_1.8V
Y10 LCD_CABC_PWM
IC1301
(1/2)
MS_PWR_ON
P24 GPIO_S__6
CPU,
AV SIGNAL
PROCESSOR,
USB_VBUS
LENS CONTROL,
AJ20 USB_VBUS
VBUS_EN MODE CONTROL,
AE21 VBUS_EN
HDMI PROCESS
VBUS_XOVR_CUR
R25 GPIO_S__2
(2/14 - 4/14)
VBUS_DET
R26 GPIO_S__1
XVBUS_DET_ATD_A
T25 GPIO_SB__5
A_VID_1.1V
D_VID_1.1V
CAM_1.2V
D_1.2V
A_1.8V
D_1.8V
EP_2.8V
A_2.8V
AU_2.8V
D_2.8V
A_3.3V
D_3.3V
MEDIA_3.3V
TE0_VCC
A_5.0V
J_5.0V
MT_5.0V
A
BL_H/L POWER (2/2)
(PAGE 4-4)
A_1.125V
HDMI_5V
MSX_3.3V
LANC_DC
BATT_LI_3V
EVER_3.0V