MSI MS-6199VA User Manual page 54

Bank 0/1, 2/3, 4/5 DRAM Timing
This item allows you to select the value in this field, depending on
whether the board has EDO (extended data output) DRAMs or SDRAMs.
The Choice: EDO 50ns, EDO 60ns,Slow, Medium, Fast, Turbo.
The Choice: SDRM 10ns, SDRAM 8ns.
DRAM Data Integrity Mode
Select Non-ECC or ECC(error-correcting code), according to the
type of installed DRAM.
The Choice: Non-ECC, ECC.
DRAM Clock
The chipset supports synchronous and asynchronous mode
between the host clock and DIMM clock. When set to Host Clk, the host
clock will be equal to the DIMM clock. When set to HCLK-33M, the host
clock minus 33 MHz is the DIMM clock.
Choices: Host Clk, HCLK-33M
SDRAM Cycle Length
When synchronous DRAM is installed, the number of clock cycles
of CAS latency depends on the DRAM timing. Do not reset this field from
the default value specified by the system designer.
The Choice: 2, 3.
Memory Hole
In order to improve performance, certain space in memory is
reserved for ISA cards. This memory must be mapped into the memory
space below 16MB.
The Choice: 15M-16M, Disabled.
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