Block Diagrams - Cd-R Section (2/2) - Sony RCD-W1 Service Manual

RCD-W1
– CD-R SECTION (2/2) –
EFM 163 EFM
BS 201 BS
RP 203 RP
1
TE 198 TE
CD-R
FE 197 FE
SECTION
RX 191 RX
(1/2)
TX 192 TX
(Page 25)
TP
C34M
34MCLK 8 EFM
FAO
207 FAO
TAO
208 TAO
SLO
3 SLO
DMD
2 DMD
EFM1
183 EFM1
EFM2
184 EFM2
EFM3
185 EFM3
WRSMP
180 WRSMP
RESAMP1
181 RESAMP1
RESAMP2
182 RESAMP2
EFCK
177 EFCK
ROPC1
186
ROPC1
LDON
142 LDON
FG
7 FG
CE
204
CE
TEBC
194 TEBC
WGATE
166 WGATE
FEFS
179 FEFS
2
96-103 130-122
CD-R
SECTION
(1/2)
(Page 25)
/RST
27-34 36-43,45
SYS BUS
DOUT 146
DSP
SERVO
HD0
IC201
I
HD15
DIOWB
HWR# 70
DIORB
HRD# 69
BUS DA1
HA1 62
BUS DA0
HA0 60
BUS DA2
HA2 59
CSB1
CS1FX 57
CSB3
CS3FX 56
RD0
I
RD15
RA0
I
RAD9
RCASH# 30
RCASL# 31
RRAS# 38
RWE# 37
ROE# 36
104 105 106 107 110 111 112 113
53 95
70 71 5 4 58 88 89 17 3
97 94 95 98 85 2 25 26
RECORD CONTROL
IC301
OUTDATA1 <0>
I γ SDR
OUTDATA1 <7>
γ LRCK
OUTDATA2 <0>
I γ SCLK
DA0-DA15 OUTDATA2 <7>
γ CLK_OUT
OUTDATA2 <0>
I
OUTDATA2 <7>
DIOWB PCLK_OUT
73 DIOWB
DIORB
72
DIORB
PDATA
BUS_DA1
BUS_DA <1>
70
BUS_DA0
BUS_DA <0>
71
BUS_DA2 PLRCK
89 BUS_DA <2>
CSB1
88
CSB1
RAM RAM
CSB3
IC203 IC302 87 PSCLK
CSB3
I/O0 RAM_DATA <0>
I/O0
I I
I
I/O7 RAM_DATA <7>
I/O15
DUBSEL
A0
CLKSEL<0>
A0 RAM_ADDRESS <0>
I
I I
CLKSEL<1>
A9
A14 RAM_ADDRESS <14>
P_CLK
31 /UCAS
32 /LCAS
/WE
27 30 RAM_WEB
CLK_IN
15 /RAS
OE 22 31 RAM_OEB
14 /WE
20 32 RAM_CSB
/CS
30 /DE
61
X701
20MHz
66 67 8
REC_TXD
REC_RXD
REC_CLK
SYSTEM CONTROL
FWE_ON
IC701 (2/2)
FWE
FWMD2
BTS_RXD
BTS_TXD
46 47
S701
(LOADING) ( TRAY )
OPEN
26 26
DATA SELECT
IC307
2
15
1
5
CDR DATA
4 4 RXP TXP
3
10 9,11
SRC
IC306
MDA_DATA
46 18 SDOUT
MDA_LRCK
44 17 OLRCK
MDA_CLK
45 16 OSCLK
DAC_MCK OMCK
21
48 OMCK
DATA SELECT
SDAC_MCK
IC304
49
P_DATA
43 3
I
4 14 SDIN
AD_DATA
SDA/CDOUT
5
P_LRCK AD0/CS
41 1
AD_LRCK 15 12 ILRCK
AD1/CDIN
2
SCL/CCLK
P_CLK
42 13 I NT
14 13 ISCLK
AD_CLK
12 RST
9,10,11
DUBBING
51
CLKSEL0
59
CLKSEL1 IC303
60
4
62
CLOCK OSC
65
IC310
X301
33.8688MHz
AUD_MUTE
RESET
FWRST
IC101
1 OUT IN 2 D+5V
+3.3V REG.
IC102
+3.3v 4 OUT VCC 2
CTRL
1
12
14
16
9
PN201
D701
10 OR
FWEN
75 FWMD2
TEST
15 RXD
CONNECTOR
13 TXD
OPT IN
26 TXP OUT
MDA_DATA
MDA_DATA
B
MDA_LRCK
MDA_LRCK
MDA_CLK
MDA_CLK
AUDIO
AD_DATA
AD_DATA SECTION
AD_LRCK
AD_LRCK (Page 28)
AD_CLK
AD_CLK
DAC_MCLK
MCLK
SDAC_MCK
SDAC_MCK
AUD.MUTE
CDR_MUTE
P_DATA
P_PCMDT
P_LRCK
P_LRCK
P_CLK
P_BITCK
1 SRC_DOUT
SRC_CS
2
SRC_DIN
27
SRC_CLK
28
19 SRC_INT
SRC_RESET
9
OPT_S
OPT_SEL
M_S
M_PBSEL
S_PBSELT
DUBBING
AS_DUBBING
CLKSEL0
DUB_SPD0
CLKSEL1
DUB_SPD1
CDP_33M
2
MCKO
A
CDP
SECTION
(Page 27)
REC_TXD
RW_RXD
REC_CLK
•Signal Path
: CD PLAY
: CD (DIGITAL)
I : CD REC