Nokia RH-13 Series Troubleshooting Manual page 9

CCS Technical Documentation
•Hw "core" regulators "on": Vio, Vcore, VR3, Vflash1
•These regulators are supplying the processors, memory, chip interfaces and
clock source in RF
• Reset releasing delay
•Supply voltages stabilize to their UEM hw default values
•RFCLK grows to full swing
•Core is ready to run but waiting for PURX release
• Reset releasing
•UPP releases the SLEEPX up to "non sleep" -state to prevent the UEM switching
the regulators "OFF"
MCU starts running the Bootstrap Code
•written in stone/ UPP internal ROM
•the program checks if there exists any reason for FDL mode (Flash Down Load)
•If there exists executable code in FLASH and there exists no reason for FDL, the
MCU starts running the MCU program from FLASH.
MCU runs the FLASH MCU code
•the phone initialization, user interfaces, internal blocks etc
•Core regulator voltage setting for required DSP speed
•Initializes the DSP and concerning hw
•Releases DSP reset -> DSP starts running
Note: In the figure below RF_Clk frequency appears to be lower than 19.2MHz
because of too low oscilloscope sampling frequency (2kS/s).
Issue 1 11/02 ãNokia Corporation
RH-13
Troubleshooting
Page 9