Power Up And Reset - Nokia RH-3 Series Troubleshooting - Bb

CCS Technical Documentation

Power Up and Reset

Power up and reset is controlled by the UEM ASIC. RH-3 baseband can be powered up in
the following ways:
• By the Power button, which means grounding the PWRONX pin of the
UEM
• By connect the charger to the charger input
• By the RTC Alarm, when the RTC logic has been programmed to give
an alarm
After receiving one of the above signals, the UEM counts a 20ms delay and then enters
its reset mode. The watchdog starts up, and if the battery voltage is greater than Vcoff+,
a 200ms delay is started to allow references, etc. to settle. After this delay elapses, the
VFLASH1 regulator is enabled. Then, 500us later VR3, VANA, VIO, and VCORE are enabled.
Finally the Power Up Reset (PURX ) line is held low for 20 ms. This reset, PURX, is sent to
UPP; resets are generated for the MCU and the DSP. During this reset phase, the UEM
forces the VCTCXO regulator on — regardless of the status of the sleep control input sig-
nal to the UEM. The FLSRSTx from the UPP is used to reset the flash during power up and
to put the flash in power down during sleep. All baseband regulators are switched on at
the UEM power on — except for the SIM regulator and Vflash2. Vsim and Vflash2 are not
used. The UEM internal watchdogs are running during the UEM reset state, with the
longest watchdog time selected. If the watchdog expires, the UEM returns to power off
state. The UEM watchdogs are internally acknowledged at the rising edge of the PURX
signal in order to always give the same watchdog response time to the MCU.
The following timing diagram (Figure 5 on page 10) represents UEM start-up sequence
Issue 1 06/2003
Figure 4: Flashing, continued
Nokia Corporation
Troubleshooting — BB
FLASH_3
CH1 = PU RX
CH2 = MBUS
CH3 = FBUSTX
CH4 = FBUSRX
Measure points
Production test pattern
(J396)
Data transfer has
started (Fbus_Rx)
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