LG VX8500 Service Manual page 35

VX8500
DCN
R-TAP
MAX2205
EBS+T
HDET
PCS
R-TAP
Li-Ion Linear
Charger Control
LDO X 8
Thermal
Shutdown
ON/OFF Control
& I2C I/F
CDMA
Antenna DCN
LM56C
Duplexer
CDMA RF
PCS
connector
Duplexer
FSLF-080HR
ACMD-7402
GPS
Antenna
GPS BPF GPS Pre-LNA
GPS RF
B7839
ALM1106-TR1
connector
[Figure 2-2] Block Diagram of Digital/Voice Processing Part
2.3.4 Memory Part
MCP contents 1Gbits NAND FLASH memory and 512Mbits SDRAM. In the NAND Flash Memory part of
MCP are programs used for terminal operation. The programs can be changed through downloading after the
assembling of terminals. On the SDRAM data generated during the terminal operation are stored temporarily.
2.3.5 Power Supply Part
When the battery voltage (+4.0V) is fed and the PWR key of keypad is pressed, U301(PMIC) is activated by the
PWR_ON_SW signal, and The PWRON signal is held high, Buck and LDO1,2,3 are turned on; when LDO1
reaches 87% of its final value a 60ms reset timer is started at after which RESET\ is asserted high. Now the
BB Processor is initialized and will assert PWRHOLD high. PWRHOLD maintains the power on.
The Buck/LDO1,2,3 are generating the +1.4V_MSMC, +2.6V_MSMA, +1.8V_MSMP1 and +2.8V_LCD
respectively.
The Rx part LDO(Out5) is operated by the control signal SLEEP/ from MSM6500
The Tx part LDO(Out4) is operated by the control signal IDLE/ from MSM6500.
LG Electronics Inc.
AWT6310
B9003
DCN BPF
DCN
Dual PAM
PCS
B9014
LO Gen &Dist
Gain
PCS BPF Control
Circuits
PMIC
Tx VCO
MAX1829
RFT6150
Scaled Batt
Monitor
RESET
DC-DC
I2C control
(From MSM6500)
USB TCVR
UVLO
F
ref
Loop Filter PLL
0
for CDMA Rx
CDMA VCOs
B7838
DCN BPF
B7847
PCS BPF
B7840
GPS BPF
Diversity
Rx VCO
LO Gen
&Dist
RFR6500
42
MSM
Tx_I MSM Core
JTAG I/F
ARM926EJS
with Jazelle
Tx_Q
PLL
Modem
QDSP4000
QDSP4000
SBI Control
Processors
CDMA
Processor 1X,
1X EV-DO
GSM/GPRS
Processor
T PLL
X
gpsOne
Processor
Bluetooth 1.1
Buffer
Processor
KIC7SZ04FU
Tx DAC
Loop Filter
for CDMA Tx SBI
Ref.
Rx ADC
TCXO
ERF3003B
Dual Memory
F
ref
Buses
EBI1
EBI2
SBI Control
Diversity
MSM6500
Rx VCO
LO
Connectivity
Gen
Keypad I/F
&Dist
SD/SDIO
Rx0_I
USB On The
Go
UART1
Primary Path
Rx0_Q
UART2/RUIM1
UART3/RUIM2
Audio
Rx1_I
MP3, AAC,
EVRC, QCELP
AMR, CMX,
Secondary Path
Rx1_Q
MIDI
Video
MPEG-4
H.263, H.264
Graphics
OpenGL? ES
3D, 2D
GPS VCO
Camera
PLL1
F
Processing
ref
Loop Filter
for GPS
DSP
MCP
EBI1 DSP Core
ARM9
512MBit
SDRAM High Speed
Host I/F
EBI2
PLL
1GBit
32Mbit
NAND
Memory
Memory
Controller
Wolfson
CODEC
CODEC
MPEG4 /
H.263 H/W
WM8973
CODEC
2D Graphics
Real time
JPEG
Sensor I/F
Speaker
Scaler Engine
Recep-
TV ENC I/F
tacle
Main / Sub
(Earjack)
LCD I/F
SBI
Rx ADC
MIC
MV8620
Connectivity
INTR Control
1.3M CMOS,
WDT / Timer
Image Sensor
Audio I/F(I2S)
USB1.1
I2C
GPIO
SD / MMC / T-
Micro SD
Flash / NAND
Touch Flash
Key
Sensor
LCD
1 2 3 512Mbit
2.0뮃
NAND
4 5 6
QVGA
7 8 9
*
0 #
Receptacle
Keypad
Stereo
Headset
From WM8973
USB
RB04
UART
Bluetooth
RF
CHARGER
Module