Advanced Chipset Features - Biostar 945P-A7A Bios Setup Manual

945P-A7A BIOS Manual

4 Advanced Chipset Features

This submenu allows you to configure the specific features of the chipset installed on your
system. This chipset manage bus speeds and access to system memory resources, such as
DRAM. It also coordinates communications with the PCI bus. The default settings that came
with your system have been optimized and therefore should not be changed unless you are
suspicious that the settings have been changed incorrectly.
Figure 4. Advanced Chipset Setup
DRAM TIMING SELECTABLE
When synchronous DRAM is installed, the number of clock cycles of CAS latency
depends on the DRAM timing.
The Choices: By SPD (default), Manual.
CAS LATENCY TIME
When synchronous DRAM is installed, the number of clock cycles of CAS latency
depends on the DRAM timing.
The Choices: Auto (default),3,4,5,6.
DRAM RAS# TO CAS# DELAY
This field let you insert a timing delay between the CAS and RAS strobe signals, used
when DRAM is written to, read from, or refreshed. Fast gives faster performance; and
slow gives more stable performance. This field applies only when synchronous DRAM is
installed in the system.
The Choices: Auto (default),2,3,4,5,6.
16