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Sony HDR-UX3E Service Manual page 15

Digital hd video camera recorder
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1
2
3
4
VC-487 BOARD (5/15)
A
CPU(SIGNAL PROCESS 1)
XX MARK:NO MOUNT
:Voltage measurement of the CSP ICs
and the Transistors with mark,are
not possible.
B
D_3.3V
C
A_2.8V
(15/15)
D_2.8V
A_1.2V
@227
D_1.2V_EX
(7/15)
L2101
10uH
D
X2101
R2108
12MHz
0
4
3
1
2
C2102
C2130
0.1u
XX
E
@228
CLK_SYS_OUT
(10/15)
F
@229
XEX_RST
(15/15)
G
PAL:UX3E/UX5E/UX7E
H
I
J
@230
STABLE_RUN
(15/15)
@231
K
BOOT_MODE_PORT0
BOOT_MODE_PORT2
(15/15)
L
M
N
O
P
REG_GND
05
HDR-UX3E/UX5/UX5E/UX7/UX7E_L3
5
6
7
8
9
L2102
IC2102
10uH
5
XX
1
4
A_1.2V
3
2
A7
PLL1_VCC
B7
PLL1_GND
C2106
A6
PLL2_VCC
0.001u
R2180
0
B6
PLL2_GND
E1
PLL3_VCC
D1
PLL3_GND
C2128
G1
PLL4_VCC
0.1u
F1
PLL4_GND
H1
PLL5_VCC
J1
PLL5_GND
C2105
K1
PLL6_VCC
10u
L1
PLL6_GND
B3
CLK_SYS_IN
C2
CLK_AUDIO_IN
R2117
1k
G2
RESET
C2103
10p
E2
PLL_MODE2
F3
PLL_MODE1
D2
PLL_MODE0
R2120
0
F2
PLL_BYPASS
R2119
0
H2
PCV
NTSC:UX5/UX7
E3
TESTMODE
V4
TDI_1
CL2101
CL2102
U3
TCK_1
CL2103
W3
TMS_1
T4
TDO_1
CL2104
CL2105
W4
RTCK_1
CL2106
T3
TRST/BKTGIO_1
CPU
CL2107
V1
TDI_0
CL2108
T2
TCK_0
U2
TMS_0
CL2109
IC2101(1/6)
CL2110
U1
TDO_0
IC2101 (1/6)
CL2111
T1
BKTGIO_0
CXD4212AGG-TL
CL2112
R1
JTAG SEL[3]
CL2113
R2
JTAG SEL[2]
P2
JTAG SEL[1]
CL2114
CL2115
P1
JTAG SEL[0]
CL2116
V2
STABLE_RUN
BOOT_MODE[4]
AA4
AA1
BOOT_MODE[3]
AA3
BOOT_MODE[2]
R2105
100k
BOOT_MODE[1]
Y1
AA2
BOOT_MODE[0]
10
11
12
13
14
15
D_3.3V
AVDD1
AA32
L2103
AVDD1
AB32
10uH
AGND1
V32
C2114
C2123
0.001u
AGND1
W32
10u
AGND1
Y32
AVDD2
V33
AVDD2
V34
@218
C2115
AGND2
U35
0.1u
AGND2
Y35
C2122
0.1u
AVDD3
AA35
AGND3
W34
ADVDD
AA33
ADVDD
AA34
C2116
0.001u
ADGND
Y33
L2104
ADGND
Y34
10uH
DVDD
AB33
DVDD
AB34
D_1.2V_EX
C2117
C2124
0.1u
10u
DVSS
AC32
DVSS
AD32
GNDS
AC33
R2121
R2124
620
100
GNDS
AC34
±0.5%
±0.5%
RREF
AB35
VBUS
AC35
USB_ID
U32
DP
W35
DM
V35
USB_VBUS_CHG
T34
USB_VBUS_DISCHG
U33
USB_VBUS_EN
U34
@212
C2131
2.2u
A_2.8V
(3/15)
FB2101
(8/15)
AVCC
R33
AVSSQ
R32
VRH
N34
R2125
R2122
VRL
P34
1k
10k
±0.5%
±0.5%
VRN
R34
VRP
N35
R2126
AIN
1k
P35
@232
±0.5%
AOUT
R35
SYS_SOUND
(14/15)
C2110
0.001u
FB2102
AVCC_DAC
P33
AVSS_DAC
P32
C2120
VREF
N33
0.01u
V_OUT
N32
C2133
R2154
1u
100k
C2111
0.001u
R2155
AVCC_ADC2
AG33
100k
AVSS_ADC2
AE33
RB2103
ADC2_IN1
AM35
1k
@233
TP_X
ADC2_IN2
AN34
C2125
1
2
TP_Y
0.01u
3
4
ADC2_IN3
AM34
(14/15)
5
6
7
8
ADC2_IN4
AM33
C2126
0.01u
AVSS_ADC1
AD35
AVCC_ADC1
AJ32
C2112
HOTSHOE_ID1
0.001u
ADC1_IN1
AL35
HOTSHOE_ID2
ADC1_IN2
AK34
ADC1_IN3
AL34
ADC1_IN4
AK33
ADC1_IN5
AG35
ADC1_IN6
AF35
ADC1_IN7
AK35
ADC1_IN8
AL33
@234
RB2104
R2152
R2158
C2113
100k
10k
0.001u
1M
2
4
6
8
(14/15)
AVCC_ADC0
AG32
AVSS_ADC0
AD34
1
3
5
7
RB2101
ADC0_IN1
AH35
1k
KEY_AD0
ADC0_IN2
AH34
8
7
6
5
ADC0_IN3
AJ35
KEY_AD2
4
3
2
1
ADC0_IN4
AH33
KEY_AD3
RB2102
ADC0_IN5
AG34
1k
ADC0_IN6
AF34
8
7
6
5
ADC0_IN7
AJ34
4
3
JACK_AD
2
1
ADC0_IN8
AJ33
R2153
1M
KEY_AD1
MEM_SEL1
@235
MEM_SEL2
ZOOM_VR_AD
(15/15)
USB_D+
USB_D-
4-11
16
17
18
19
20
VIN_Y7
D15
VIN_Y[7]
VIN_Y6
C15
VIN_Y[6]
VIN_Y5
B17
VIN_Y[5]
VIN_Y4
B16
VIN_Y[4]
VIN_Y3
B15
VIN_Y[3]
VIN_Y2
A15
VIN_Y[2]
VIN_Y1
C16
VIN_Y[1]
VIN_Y0
D16
VIN_Y[0]
VIN_C7
C17
VIN_C[7]
VIN_C6
D17
VIN_C[6]
@219
VIN_C5
C19
VIN_C[5]
VIN_C4
C18
VIN_C[4]
(3/15)
VIN_C3
A19
VIN_C[3]
VIN_C2
D18
VIN_C[2]
VIN_C1
D19
VIN_C[1]
VIN_C0
B19
VIN_C[0]
A16
DOLCE_VCLK_OUT
A18
VIN_CLK_IN
EXT_CAM_CLK
EXT_CAM_CLK_IN
A20
VIN_FLD
A17
VIN_FLD
VIN_VD
VIN_VD
D20
VIN_HD
C20
VIN_HD
STL_BUS_CTRL
C21
MILANO_FLD
MILANO_VD
B21
(3/15)
D21
MILANO_FD
(4/15)
EXT_CAM_VD
B20
EXT_CAM_VD
(14/15)
A21
HD/SD_IN
STL_DATA15
A11
STL_DATA[15]
STL_DATA14
C11
STL_DATA[14]
STL_DATA/CCD_IN13
B11
STL_DATA/CCDIN_A[13]
STL_DATA/CCD_IN12
B12
STL_DATA/CCDIN_A[12]
STL_DATA/CCD_IN11
D11
STL_DATA/CCDIN_A[11]
STL_DATA/CCD_IN10
C13
STL_DATA/CCDIN_A[10]
STL_DATA/CCD_IN9
B13
STL_DATA/CCDIN_A[9]
STL_DATA/CCD_IN8
A12
STL_DATA/CCDIN_A[8]
STL_DATA/CCD_IN7
C12
STL_DATA/CCDIN_A[7]
STL_DATA/CCD_IN6
D13
STL_DATA/CCDIN_A[6]
STL_DATA/CCD_IN5
A13
STL_DATA/CCDIN_A[5]
STL_DATA/CCD_IN4
D12
STL_DATA/CCDIN_A[4]
STL_DATA/CCD_IN3
C14
STL_DATA/CCDIN_A[3]
STL_DATA/CCD_IN2
A14
STL_DATA/CCDIN_A[2]
STL_DATA/CCD_IN1
B14
STL_DATA/CCDIN_A[1]
STL_DATA/CCD_IN0
D14
STL_DATA/CCDIN_A[0]
STL_ADDR11
G10
STL_ADDR[11]
STL_ADDR10
H13
STL_ADDR[10]
STL_ADDR9
G11
STL_ADDR[9]
CPU
STL_ADDR8
G12
STL_ADDR[8]
STL_ADDR7
G13
STL_ADDR[7]
STL_ADDR6
H11
STL_ADDR[6]
IC2101(2/6)
STL_ADDR5
H12
STL_ADDR[5]
STL_ADDR4
K10
STL_ADDR[4]
IC2101 (2/6)
CXD4212AGG-TL
STL_ADDR3
H14
STL_ADDR[3]
STL_ADDR2
J10
STL_ADDR[2]
STL_ADDR1
H10
STL_ADDR[1]
STL_ADDR0
J11
STL_ADDR[0]
STL_BS1
G14
STL_BS[1]
STL_BS0
J15
STL_BS[0]
STL_XRAS
G15
STL_RAS
STL_XCAS
J16
STL_CAS
STL_XWE
H15
STL_WE
D6
STL_CS1
STL_XCS0
C7
STL_CS0
STL_CKE
C6
STL_CKE
STL_CLK
A8
STL_CLK_OUT
R2111
0
A9
STL_BUS_CTRL
C10
CCD_FLD
B10
CCD_FD
D10
CCD_HD
C9
CKTG_O
D9
CKTG_I
B9
CKTG_EXT
D7
CK_AD
C8
CLAMP_DUMMY
D8
CLAMP_OPB
F4
MSHUT_EN
M1
STRB_ON1
N3
STRB_ON2
N4
CAM_V/STRB_ON3
R4
VSUB_CONT
N7
DIR0A
K8
DIR0B
M7
BRK0A/EN0
H8
BRK0B
L9
DIR1A
J8
DIR1B
L8
BRK1A/EN1
H9
BRK1B
P8
DIR2A
L7
DIR2B
K7
BRK2A/EN2
J7
BRK2B
A5
SENS1A
B5
SENS1B
SENS0
AE32
AF32
SENS2
AE35
FG1A
FG1B
AE34
21
22
23
24
25
LCD_PDR[7]
D26
LCD_PDR[6]
C26
LCD_PDR[5]
C27
LCD_PDR[4]
B26
LCD_PDR[3]
B27
LCD_PDR[2]
A26
R2183
100k
LCD_PDR[1]
A27
R2175
100k
@236
(12/15)
LCD_PDR[0]
D27
XHDMI_RST
(13/15)
LCD_PDG/LCD_Y/LCD_SNE[7]
C29
SYS_V
@225
LCD_PDG/LCD_Y/LCD_SNE[6]
C28
SSS
LCD_PDG/LCD_Y/LCD_SNE[5]
D29
XWEN
(4/15)
HDMI_RST
A28
LCD_PDG/LCD_Y/LCD_SNE[3]
A29
LCD_PDG/LCD_Y/LCD_SNE[2]
D28
EVF_BL_ON
LCD_PDG/LCD_Y/LCD_SNE[1]
B29
TP_SEL1
LCD_PDG/LCD_Y/LCD_SNE[0]
B28
TP_SEL2
LCD_PDB/LCD_C[7]
A31
@237
LCD_PDB/LCD_C[6]
C30
PON_SW
R2179
LCD_PDB/LCD_C[5]
A30
0
UX7/UX7E
(14/15)
LCD_PDB/LCD_C[4]
D31
LCD_PDB/LCD_C[3]
B30
LCD_PDB/LCD_C[2]
B31
LCD_PDB/LCD_C[1]
C31
LCD_PDB/LCD_C[0]
D30
IR_LED_ON
LCD_CLK_OUT
A32
LCD_EXT_CLK_IN
A25
@238
STRB_CHARGE
(15/15)
LCD_HS
C25
LCD_VS/SYS_V
D25
LCD_PDEN
D24
DR_VDATA[7]
C33
DR_VDATA7
DR_VDATA[6]
B33
DR_VDATA6
DR_VDATA[5]
C34
DR_VDATA5
DR_VDATA[4]
D32
DR_VDATA4
DR_VDATA[3]
D34
DR_VDATA3
DR_VDATA[2]
D33
DR_VDATA2
DR_VDATA[1]
E34
DR_VDATA1
DR_VDATA[0]
D35
DR_VDATA0
DR_GHDATA[3]
F33
DR_GHDATA3
@239
DR_GHDATA[2]
E33
DR_GHDATA2
DR_GHDATA[1]
G33
DR_GHDATA1
(11/15)
DR_GHDATA[0]
E32
DR_GHDATA0
DR_GSDATA[3]
F34
DR_GSDATA3
DR_GSDATA[2]
F32
DR_GSDATA2
DR_GSDATA[1]
G34
DR_GSDATA1
DR_GSDATA[0]
G32
DR_GSDATA0
DR_GHPILOT
H35
DR_GHPILOT
DR_GSPILOT/SYS_V
G35
DR_GSPILOT
R2139
47
DR_VINCK_OUT
F35
DR_VINCK
DR_SCK54_OUT
E35
DR_SCK54
R2113
33
IC_2701_DATA[7]
J32
IC_2701_DATA7
IC_2701_DATA[6]
K33
IC_2701_DATA6
IC_2701_DATA[5]
K32
IC_2701_DATA5
IC_2701_DATA[4]
L34
IC_2701_DATA4
IC_2701_DATA[3]
L33
IC_2701_DATA3
IC_2701_DATA[2]
L32
IC_2701_DATA2
IC_2701_DATA[1]
M33
IC_2701_DATA1
IC_2701_DATA[0]
M32
IC_2701_DATA0
@240
IC_2701_FLD
K34
IC_2701_FLD
(10/15)
C2129
R2172
8p
33
IC_2701_VCLK_OUT
K35
IC_2701_VCLK
IC_2701_SYSCLK_OUT
L35
R2136
0
R2174
0
IC_2701_MCK_OUT
H32
IC_2701_MCK
IC_2701_LRCK_INOUT
H33
IC_2701_LRCK
IC_2701_ADATA
J33
IC_2701_ADATA
R2144
0
256fs_OUT
M29
ADA_FCK
R2145 0
BCK_OUT
M28
ADA_BCK
@241
(12/15)
(14/15)
LRCK_OUT
N29
ADA_LRCK
R2146
ADA_SIA0
0
SDI0
N28
ADA_SOA0
@242
(14/15)
SDI1
P29
ADA_SOA1
SDI2
P28
SDO0
R29
@243
(10/15)
SDO1
R28
IC_2701_SYSCLK
(14/15)
UX7/UX7E
VC-487 (5/15)

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