Overall Block Diagram - Sony NEX-FS700 Service Manual

Interchangeable lens digital hd video camera recorder
Hide thumbs Also See for NEX-FS700:
Table of Contents

Advertisement

4-1. OVERALL BLOCK DIAGRAM (1/4)    
VC-650 BOARD (1/3)
IS-102 BOARD
CN9001
CN1201
IRIS
DOP0-DOP7,
DOP0 - DOP7,
(SHUTTER)
DOM0-DOM7
DOM0 - DOM7,
IC9001
CMOS
XHS
SENSOR_H
IMAGER
M3
18
23
XVS
SENSOR_V
M4
19
22
SDO
SI
22
19
SDI
SO
23
18
SCK
SCK
24
17
XCE
XCS
INCK1
25
16
C14
XCLR
XLCR
INCK0
F13
26
15
C3
CN9002
CN1202
TH9001
IMGR_TEMP
39
2
IC9002
C2
C1
CLOCK
GENERATOR
X9001
148.5MHz
IC9005
C2
C1
CLOCK
GENERATOR
IC5401
IC5402
IC5404
IC5405
IC5406
IC5407
: AUDIO SIGNAL
IC5408
: VIDEO/AUDIO SIGNAL
IC5409
DDR3 SDRAM
(16/22)
HD-045 BOARD
FP-1573
FLEXIBLE
BOARD
CN1502
CN1501
CN1004
HPD
HDMI_TX_HPD
19
34
6
HDMI_TX_DAT0P - DAT2P,
HDMI_TX_DAT0N - DAT2N,
TX0± - TX2±
HDMI
OUT
TXC±
HDMI_TX_CLKP, HDMI_TX_CLKN
HDMI_DDCSDA
SDA
16
31
9
HDMI_DDCSCL
SCL
15
30
10
08
NEX-FS700/FS700K/FS700C/FS700CK/FS700E/FS700EK/FS700J/FS700JK/FS700R/FS700RH/FS700U/FS700UK
( ) : Number in parenthesis ( ) indicates the division number of schematic diagram where the component is located.
SUBL_DINP0 - DINP11,
SUBL_DINN0 - DINN11
IC5200
SUBL_CLKINP/CLKINN
CAMERA SIGNAL
SENS_VD
PROCESS
R20
CIS0_HD
(15/22)
3
10
AD2
IC1204
CIS0_VD
CLK_SYS_IN_IC_5200
2
11
AE2
AA3
LEVEL SHIFT
CIS0_SI
AG17
X1301
(4/22)
12MHz
CIS0_SO
IC1202
CIS0_SCK
LEVEL SHIFT
CIS0_XCS
(4/22)
XCIS_RST
5
8
AV_INT0/INT1
DDR_DQ [0-31]
HB_AD [0-15]
DDR_A [0-14]
HB_ADDR [16-20]
DDR_DQS [0-3]
HB_XWE/XADV
DDR_DQSN [0-3]
DDR_DM [0-3]
HB_XCS
DDR_BS [0-2]
DDR_CK0/CK1,
DDR_CKE0/CKE1,
DDR_CKN0/CKN1
DDR_CSN0/CSN1,
IC5201
DDR_ODT0/ODT1,
HB ENABLE SWITCH
DDR_WEN/CASN/RASN
(15/22)
DDR_XRESET
N2
J25
HDMI_JACK_IN
XSYS_RST
AA13
Q6401
LEVEL
SHIFT
4. BLOCK DIAGRAMS
RIO_D0 - D15
RIO_CKI/CKO
RIO_VLD/RDY/VD0
IC5611
BUFFER (17/22)
IC_5618_CONFIG_ON
IC_5618_CONFIG_DONE
AC30
IC_5618_SUSPEND_ON
CLK_SYS_IN
IC_5618_RST
AF2
P26
IC_5618_XCS
IC5613
IC5614
IC5615
BUFFER (17/22)
IC_5618_XCS
IC1301
XCIS_RST
IC_5618_SCK
N25
(1/3)
IC_5618_SI
CPU, CAMERA DSP,
IC_5618_SO
AV SIGNAL PROCESS,
LENS CONTROL,
MODE CONTROL
(5/22 - 7/22)
BCK_OUT
IC_5618_BCK_OUT
IC_5618_CLK
1
LRCK_OUT
SDO
OVERALL (2/4)
(PAGE 4-2)
IC5608
BUFFER
(17/22)
1
HB_XOE
HDMI_RX_DAT0P - DAT2P,
HDMI_RX_DAT0N - DAT2N
HDMI_RX_CLKP/CLKN
XSYS_RST
56
2
XSYS_RST
D1
OVERALL (4/4)
(PAGE 4-4)
HDMI_JACK_IN
HDMI_TX_DAT0P - DAT2P,
TRANSMITTER
HDMI_TX_DAT0N - DAT2N
HDMI_TX_CLKP, HDMI_TX_CLKN
HDMI_DDCSDA
HDMI_DDCSCL
4-1
CONFIG_DONE
IC5612
CONFIG_ON
CONFIG_ON
DIN
CONFIG_DONE
CCLK
TDO
INIT_B
TMS. TCK
D9
IO_MDDR_DQ0 - DQ15
MDDR_A0 - A12, O_MDDR_A13
O_MDDR_BA0/BA1,
I_SCK
O_MDDR_LDM/UDM,
O_SO
O_MDDR_CAS_X,
O_MDDR_RAS_X,
I_SI
IC5618
O_MDDR_WE_X,
O_MDDR_CKE,
HDMI PROCESS,
O_MDDR_CLK_OUT,
3G-SDI PROCESS
O_MDDR_CLKN_OUT
IC5605
(17/22)
IO_MDDR_LDQS,
IC5606
IC5607
IO_MDDR_UDQS,
BUFFER (17/22)
I_BCK
I_LRCK
I_AUIN
O_LM_H
V5
O_LM_V
R5
O_LM_F
4
IC_5618_CLK_SYS
C10
O_LM_INIT,
I_LM_CLK/CLKN,
I_LM_NOALIGN/NOLOCK,
I_LM_NOREF
IC_5618_I2C_SDA/SCL
IC_5618_I2C_SDA/SCL
I_HDMI_DATA0-DATA15
I_HDMI_HS
46
V15
I_HDMI_VS
47
V16
IC6201
I_HDMI_AD,
HDMI
I_HDMI_LRCK,
RECEIVER
I_HDMI_BCK
O_DOUT00 - DOUT19
(21/22)
I_HDMI_CLK/DE
O_HSYNC
A16
O_VSYNC
D18
4
2
58
O_SDOUTTDO,
O_XCSTMS,
X6201
O_WCLK1, O_ACLK1
28.636363MHz
IC6202
O_AIN_12,
O_STANBY,
CLOCK BUFFER
O_RATESEL0/RATESEL1
(21/22)
O_DETECTTRS,
O_TIM861,
O_XANCBLANK,
O_GRP1EN_XDIS,
O_HDMI_DATA0-DATA15
O_F_DE,
O_SDOEN_XDIS, O_IOPROCEN_XDIS,
O_HDMI_HS
O_PCLK, O_SCLKTCK
C3
N15
O_HDMI_VS
A3
M14
I_AUDIOINT,
IC6401
I_LOCKED,
O_HDMI_AD,
I_SDINTDI,
O_HDMI_LRCK,
HDMI
O_HDMI_BCK
O_XRESET
D12
(22/22)
O_HDMI_CLK/DE
IC5601
PROM
(17/22)
IC5901
DDR SDRAM
(19/22)
IC5801
VCXO,
LOOP FILTER
(18/22)
3
+
1
3
4
-
4
IC5803
34
VIDEO PLL
X5801
(18/22)
27MHz
J6001
3G/HD/SD
SDI OUT
CN6001
A4
SDO
C4
IC6002
3G-SDI
TRANSMITTER
(20/22)
G8

Advertisement

Table of Contents
loading

Table of Contents