Schematic Diagram - Main Section (5/5) - Sony MEX-GS810BH Service Manual

MEX-GS810BH/N6000BH

5-10. SCHEMATIC DIAGRAM - MAIN Section (5/5) -

1
MAIN BOARD
A
B
C
D
E
(Page
32)
10
F 10
MAIN
11
BOARD
(3/5)
22
23
24
12
25
26
G
MAIN 27
BOARD
28
(4/5)
(Page
29
30
33)
31
32
H
I
J
39
6
40
41
MAIN
BOARD 42
(2/5)
43
(Page
K
31)
L
M
N
N
MEX-GS810BH/N6000BH
• See page 27 for Waveforms. • See page 35 for IC Block Diagrams. • See page 38 for IC Pin Function Description.
2 3 4 5 6
(5/5)
R680
100
R513
100
R567
0
DEC_BCK_IN
IC504
RC_IN0
KEY_IN0
BUFFER
IC504
74LVC1G17GW-125
KEY_IN1
3.3
1 NC VCC 5
(1.6)
2
(1.7)
3 GND 4
R541
100k
FB503
XM_PWR
R512
100
IC1009
R501
100
EEPROM
EN_SYS
IC1009
MFI337S3959
ECO
3.3
1 GND VCC 8
3.3 0 USB_OVR
2 SDA RST 7
3.3 I2C0_SCL
3 NC SCL 6
R514 100 R529
4 NC NC 5
R515 100
R1117 C1094
0 0.1
R517
100
I2C0_SDA
R516
100
USB_ON
R556
100
RC_IN1
CL501 R503
I2C0_SCL
I2C0_SDA CL502 R504
I2C1_SCL CL503 C562 47p R505
CL504 C563 47p R506
I2C1_SDA
CL514 R530 100
I2C2_SCL
I2C2_SDA CL515
R510 1k
R531 RE_IN0
100
R511 1k
RE_IN1
R544 33k
R540 33k
R1368
0
C564
C566
R1367
C509
0
C510
C501 100
IC04
EEPROM
IC04
R1EX24256BSAS0A
3.2
SDA VSS
5 4
3.2
SCL A2
6 3 R1372
WP A1 0
3.3 7 2
VCC A0
8 1
C853
0.1
7 8 9 10 11
IC B/D IC501
RESET SIGNAL GENERATOR
IC501
BU4228F-STR
C531
1 4 3.3
15p
GND VOUT
3.3 2 3 1.6
VDD CT
C571
0.1
R519
C559
100
0.0033
R681 C528 C560 C516 C517 C570 C1365 C523 R571 C529
C524
10p 100k 10p 10 1 0.1 2.2 1 0.1 0 0.1
X502
13.333MHz
R574
0
7
R572 R586
100k 100k R573
100k
R566 R563 R562 R666
10k 10k 10k 0
R551 100 R594 0
R554 100 R608 0
R555 100
6
R684
C508 C512 C515
0
0.001 0.1 0.1
CL509
0
BSCANP
89
3.3
PVcc
90
CL507 (1.7)
Paradisso_BCK
91
CL508 NC
92
Vss
93
SYNC_ON
94
1.1
Vcc
R525 100 95
3.3
XM_PWR
96
R545 10k
0
TRST
97
R542 100 0.6
TDO
R509 100 98
3.3
TDI
R502 100 R546 10k 99
3.3
TMS
100
R547 10k 0
TCK
101
R548 10k
Vss
R520 100 R549 100k 102
3.3
ILL_IN
103
R522 100
3.3
EN_SYS
104
R521 100k 1.1
Vcc
R682 100k R550 0 105
3.3
PWR_ECO
106
Vss
107
R524 100 R523 100k 3.3
USB_OVR
108
3.3
PVcc
100k 109
3.3
USB_ON2
110
3.3 SYSTEM CONTROLLER
USB_OVR2
111
3.3
(GS810BH) R7S7200032CFP
BT_PWR
112
NC
113
3.3
BT_RST
114
JL02 CL505
DAB_PORn
115
Vss
116
R578
DAB_ON
100
117
3.3
USB_ON
118
1.1
Vcc
119
R560 100k 3.3
RC_IN1
120
Vss
121
3.3
RE_ON
122
3.3
PVcc
123
(0)
MEC_DSW
100 R534 2.2k 124
3.3
I2C0_SCL
125
100 R535 2.2k 3.3
I2C0_SDA
126
100 2.8
I2C1_SCL
100 127
2.6
I2C1_SDA
128
R538 2.2k
3.2
I2C2_SCL
129
R539 2.2k 3.2
I2C2_SDA
C503 0.01 130
0
RE_IN0
C504 0.01 131
0
RE_IN1
132
220 6.3V
0.1
0.1
8
0.1
R553
100
10V
R565
470
C502
100
10V
R552 X501
470 48MHz
R1361
D502 R1040 C1353
5.6k
RB751V40,115 18k
34 34
12 13 14 15 16
C533
15p
X503
32.768kHz
R591
100k
R607 R618
100 100
R609
100
R657 R617
100k 100k
R658
100
R654
0
R653
R526 2.2k
100
R644
100
(3.3)
LRCK_INT 44
3.3
C554
DEBUG_TX 43 FB501 47p
1.6
SYNC_OUT 42
(0)
MEC_EJECT 41
R587 100
0
LCD_DO 40
3.3 R621 1k
PVcc 39
0
LCD_CE 38
R628
NC 37 CL529 1k
Vss 36
0 R623 1k
LCD_CLK 35
1.1
Vcc 34
(1.1)
DEC_SDIN_CH0 33
(1.5) R622 100
DEC_SDOUT_F 32
Vss 31
(1.6)
DEC_LRCK_IN 30
(1.6)
DEC_BCK_IN 29
0 R557 100
BEEP 28
R624 100
(0)
BSIF_DO 27
(3.3)
BSIF_LR 26
3.3 CL512
PVcc 25
(0)
IC503
BSIF_BCK 24
Vss 23
(0.2)
CD_SDI 22
IC503
1.1
Vcc 21
R627 100
(0)
CD_SDO 20
R634 100
(3.1)
CD_XCCE 19
Vss 18
(3.3) R625 100
CD_BUSCLK 17
(0)
BSIF_ST_REQ 16
R533 0
(3.3)
DSP_SSTBY 15
(3.3) R630 100
DSP_RST 14
(0)
DEC_INT
13 R528 0
(0)
BSIF_GATE 12
3.3
PVcc 11
(0)
CD_ZDET 10
Vss 9
R683 0
0 (3.3)
DEC_XMUTE 8
1.1
Vcc 7
(2.8)
SP_DATA 6
(3.3)
SP_CLK 5
R638 100
3.3
AMPSTB
SERVO_ON 4
3.3
AMP_MUTE
3
3.3
BT_MIC_DET
2
3.3
1
R641 R637
100k 100k
FB504
R619
FB505
100
R652
100
R649 100
R642
100
IC502
R626
100k
R613
SERIAL FLASH
100k
R615
IC502
100k
MX25L3235EM2I-10G
R614
100k
DI GND
R616
5
0
0
CLK WP
6
C545 HOLD DO
7
0.1
3.3
VCC CS
8
R561
0.1 100
Note: When IC502 on the MAIN board is replaced, the destination setting is
necessary. Refer to "DESTINATION SETTING METHOD" on page 4.
17 18 19 20
C538
0.1
1
BUS1
BUS2
MAIN
BU_3.3V BOARD
(1/5)
C543 0.1
(Page 30)
C546 0.1
C550 0.1
C551 0.1
C540 0.1
C547 0.1
C548 0.1
C549
0.1
R655
0
R643
100k
LRCK_IN
MEC_EJECT
CL535
LCD_DATA
CL536
LCD_CE
CL537 LCD_CLK
R662 10k
DEC_SDIN_CH0
R629 100 DEC_SDOUT_F
R1370 10k
R631 10k
DEC_LRCK_IN
R632 10k
DEC_BCK_IN
BEEP
BSIF_DO
R633
10k
CL539 BSIF_BCK
JL532
CD_SDO
JL531 R646 10k
CD_SDI
JL533
CD_XCCE
JL534 CD_BUSCLK
BSIF_ST_REQ
DSP_SSTBY
DSP_RST
DEC_INT
BSIF_GATE
R635 100k CD_ZDET
DEC_XMUTE
R647 100k
SP_DATA
R648 100k
SP_CLK
SERVO_ON
R592 100k R639 100 STB
R640 100k R650 100
AMP_ATT
R651
100
11
12
13
14 MAIN
BOARD
15
(3/5)
(Page 32)
JL530
CN502
R602 8P
100 JL522
1 SF_SI
R601 100 JL523
2 SF_CE
R604 100 JL524
3 SF_SO
R603 100 JL525
4 SF_CLK
R665 100 JL526
(NC)
5 WP
R656 100 JL527
6 HOLD
R600 100 JL528
7 RESET
JL529
8 GND
4
R611
3
R612
100
100
2
0
1 R610
100
MEC_SELFSW
45
7
47
48
MAIN
BOARD
(2/5)
49
(Page 31)