Diagrams; Block Diagram - Digital Video Section - Sony STR-ZA5000ES Service Manual

STR-ZA5000ES
SECTION 6

DIAGRAMS

STR-ZA5000ES
6-1.

BLOCK DIAGRAM - DIGITAL VIDEO Section -

C[0] – C[9], Y[0] – Y[9],
20 20
HS, VS, DE, LCC
C[0] – C[9], Y[0] – Y[9]
>001B
(Page 45)
HS
J2 HS
VS
K1 VS
DE
J1 DE
LCC
K2 PCLK
CLOCK
27MHZ_ADI
>002B
BUFFER B12 XTALP
IC3211
(Page 39)
SD-RAM
IC3200
16 16
DQ0 – DQ15
13 13
A0 – A12
CK J8 AA15 DDR_CK
/CK K8 Y15 DDR_/CK
CKE K2 AB15 DDR_CKE
BA0 L2 AB13 DDR_BA [0]
BA1 L3 AC13 DDR_BA [1]
BA2 L1 AC14 DDR_BA [2]
/CS L8 AA13 DDR_/CS
/RAS K7 AB14 DDR_/RAS
/CAS L7 Y13 DDR_/CAS
/WE K3 AC15 DDR_/WE
UDM B3 AA19 DDR_DM [1]
UDQS B7 AB17 DDR_DQS [1]
/UDQS A8 AC18 DDR_/DQS [1]
LDM F3 AA20 DDR_DM [0]
LDQS F7 AB22 DDR_DQS [0]
/LDQS E8 AC22 DDR_/DQS [0]
SD-RAM
IC3203
16
DQ0 – DQ15
13
A0 – A12
CK J8
/CK K8
CKE K2
BA0 L2
BA1 L3
BA2 L1
/CS L8
/RAS K7
/CAS L7
/WE K3
UDM B3 AB6 DDR_DM [3]
UDQS B7 Y7 DDR_DQS [3]
/UDQS A8 AA7 DDR_/DQS [3]
LDM F3 AB4 DDR_DM [2]
LDQS F7 Y3 DDR_DQS [2]
/LDQS E8 AA4 DDR_/DQS [2]
VIDEO PROCESSOR
IC3202
TX1_DATA0+
TX1_0+ K22
TX1_DATA0–
TX1_0– K23
TX1_DATA1+
TX1_1+ J22
TX1_DATA1–
P [2] – P [11],
TX1_1– J23
P [14] – P [23] TX1_DATA2+
TX1_2+ H22
TX1_DATA2–
TX1_2– H23
TX1_CLK+
TX1_C+ L22
TX1_CLK–
TX1_C– L23
TX1_SDA
DDC1_SDA J20
TX1_SCL
DDC1_SCL K20
HPD_TX1 L20 +5.0V_787_788
HOT PLUG
PANA_IN7_HPD
DETECT SWITCH
Q3503
TX2_DATA0+
TX2_0+ T22
TX2_DATA0–
TX2_0– T23
TX2_DATA1+
TX2_1+ R22
TX2_DATA1–
TX2_1– R23
TX2_DATA2+
DDR_DQ [0] –
TX2_2+ P22
DDR_DQ [15]
TX2_DATA2–
TX2_2– P23
TX2_CLK+
DDR_A [0] –
TX2_C+ U22
DDR_A [12] TX2_CLK–
TX2_C– U23
TX2_SDA
DDC2_SDA R20
TX2_SCL
DDC2_SCL P20
HPD_TX2 T20 +5.0V_787_788
HOT PLUG
PANA_IN8_HPD
DETECT SWITCH
Q6063
SERIAL FLASH
IC3206
MISO2 B10 2 DO (IO1)
MOSI2 B9 5 DI (IO0)
SCK2 A9 6 CLK
/CS2 A10 1 CS
DDR_DQ [16] –
DDR_DQ [31]
HDMI_2_SDA
SDA D7
HDMI_2_SCL
SCL C7
IN7_UCOM_HPD
IN8_UCOM_HPD
MISO1 B8
MOSI1 A8
SCK1 C8
/CS1 D8
INT0 C10
INT1 D10
INT2 D11
PDN C11
/RESET A11
38 38
TX1_DATA0+, TX1_DATA0–, TX1_DATA1+, TX1_DATA1–, TX1_DATA2+,
TX1_DATA2–, TX1_CLK+, TX1_CLK–, TX1_SDA, TX1_SCL
TX2_DATA0+, TX2_DATA0–, TX2_DATA1+, TX2_DATA1–, TX2_DATA2+,
TX2_DATA2–, TX2_CLK+, TX2_CLK–, TX2_SDA, TX2_SCL
VIDEO SYSTEM CONTROLLER
IC3003 (1/6)
UART_SEL2/VU
17 IN7_UCOM_HPD (PROG_VURX) 102
UART_VU/SEL2
18 IN8_UCOM_HPD (PROG_VUTX) 101
UART_VU/MU
UART TX (VU2MU) 63
135 ADV8003_SPSF_DIN UART_MU/VU
UART RX (MU2VU) 62
134 ADV8003_SPSF_DOUT MD0_MU/VU
MD0 69
133 ADV8003_SPSF_SCK ENDFLAG_VU/MU UART_VU/MU, UART_MU/VU, MD0_MU/VU,
ENDFLAG_VU/MU 64
128 ADV8003_SPI_CS RESET_MU/VU
INTIX 49
132 ADV8003_INT0
131 ADV8003_INT1
130 ADV8003_INT2 X1 71
X3000
139 ADV8003_P_DOWN
4MHz
136 ADV8003_RESET X0 70
>003B
(Page 39)
>004B
(Page 40)
HDMI_2_SDA, HDMI_2_SCL
>005B
(Page 40)
UART_SEL2/VU, UART_VU/SEL2
>006B
(Page 47)
ENDFLAG_VU/MU, RESET_MU/VU
>007B
(Page 47)
SIGNAL PATH
: VIDEO